ATTINY2313-20PU Atmel, ATTINY2313-20PU Datasheet - Page 126

IC MCU AVR 2K FLASH 20DIP

ATTINY2313-20PU

Manufacturer Part Number
ATTINY2313-20PU
Description
IC MCU AVR 2K FLASH 20DIP
Manufacturer
Atmel
Series
AVR® ATtinyr

Specifications of ATTINY2313-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Package
20PDIP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
18
Interface Type
SPI/USART/USI
Number Of Timers
2
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
128Byte
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Package Type
PDIP
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY2313-20PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATTINY2313-20PU
Quantity:
6 000
Company:
Part Number:
ATTINY2313-20PU
Quantity:
53
Asynchronous
Operational Range
126
ATtiny2313
Figure 59. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If the stop
bit is registered to have a logic 0 value, the Frame Error (FE) flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after the last of
the bits used for majority voting. For Normal Speed mode, the first low level sample can be at
point marked (A) in
(C) marks a stop bit of full length. The early start bit detection influences the operational range of
the Receiver.
The operational range of the Receiver is dependent on the mismatch between the received bit
rate and the internally generated baud rate. If the Transmitter is sending frames at too fast or too
slow bit rates, or the internally generated baud rate of the Receiver does not have a similar (see
Table
The following equations can be used to calculate the ratio of the incoming data rate and internal
receiver baud rate.
D
S
S
S
R
Table 49
Normal Speed mode has higher toleration of baud rate variations.
Table 49. Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode (U2X =
0)
F
M
# (Data+Parity Bit)
slow
Sum of character size and parity size (D = 5 to 10 bit)
Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed
mode.
First sample number used for majority voting. S
for Double Speed mode.
Middle sample number used for majority voting. S
S
is the ratio of the slowest incoming data rate that can be accepted in relation to the
receiver baud rate. R
accepted in relation to the receiver baud rate.
49) base frequency, the Receiver will not be able to synchronize the frames to the start bit.
(U2X = 0)
(U2X = 1)
Sample
Sample
M
RxD
R
and
D
= 5 for Double Speed mode.
5
6
7
slow
Table 50
=
------------------------------------------ -
S 1
Figure
R
(
D
list the maximum receiver baud rate error that can be tolerated. Note that
+
slow
93.20
94.12
94.81
1
1
+
D S ⋅
59. For Double Speed mode the first low level must be delayed to (B).
(%)
1
2
fast
)S
+
is the ratio of the fastest incoming data rate that can be
3
2
S
F
R
106.67
105.79
4
105.11
fast
5
3
(%)
6
Max Total Error (%)
7
4
8
+5.79/-5.88
+5.11/-5.19
+6.67/-6.8
STOP 1
9
5
F
10
R
= 8 for normal speed and S
M
fast
= 9 for normal speed and
(A)
0/1
6
=
0/1
-----------------------------------
(
D
(B)
0/1
0/1
(
+
D
Recommended Max
Receiver Error (%)
1
+
)S
2
)S
+
S
± 3.0
± 2.5
± 2.0
M
(C)
2543L–AVR–08/10
F
= 4

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