ATTINY2313-20PU Atmel, ATTINY2313-20PU Datasheet - Page 50

IC MCU AVR 2K FLASH 20DIP

ATTINY2313-20PU

Manufacturer Part Number
ATTINY2313-20PU
Description
IC MCU AVR 2K FLASH 20DIP
Manufacturer
Atmel
Series
AVR® ATtinyr

Specifications of ATTINY2313-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Package
20PDIP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
18
Interface Type
SPI/USART/USI
Number Of Timers
2
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
128Byte
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Package Type
PDIP
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
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ATTINY2313-20PU
Manufacturer:
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Company:
Part Number:
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53
Digital Input Enable
and Sleep Modes
50
ATtiny2313
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and define
the port pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The resulting pin
values are read back again, but as previously discussed, a nop instruction is included to be able
to read back the value recently assigned to some of the pins.
Note:
As shown in
Schmitt Trigger. The signal denoted SLEEP in the figure, is set by the MCU Sleep Controller in
Power-down mode, and Standby mode to avoid high power consumption if some input signals
are left floating, or have an analog signal level close to V
SLEEP is overridden for port pins enabled as external interrupt pins. If the external interrupt
request is not enabled, SLEEP is active also for these pins. SLEEP is also overridden by various
other alternate functions as described in
If a logic high level (“one”) is present on an asynchronous external interrupt pin configured as
“Interrupt on Rising Edge, Falling Edge, or Any Logic Change on Pin” while the external interrupt
is not enabled, the corresponding External Interrupt Flag will be set when resuming from the
above mentioned Sleep mode, as the clamping in these sleep mode produces the requested
logic change.
Assembly Code Example
C Code Example
unsigned char i;
...
; Define pull-ups and set outputs high
; Define directions for port pins
ldi
ldi
out
out
; Insert nop for synchronization
nop
; Read port pins
in
...
...
/* Define pull-ups and set outputs high */
/* Define directions for port pins */
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);
/* Insert nop for synchronization*/
__no_operation();
/* Read port pins */
i = PINB;
...
1. For the assembly program, two temporary registers are used to minimize the time from pull-
ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2 and 3
as low and redefining bits 0 and 1 as strong high drivers.
r16,(1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)
r17,(1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)
PORTB,r16
DDRB,r17
r16,PINB
Figure
22, the digital input signal can be clamped to ground at the input of the
(1)
“Alternate Port Functions” on page
CC
/2.
51.
2543L–AVR–08/10

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