IC AVR MCU 4K 10MHZ 1.8V 32-QFN

ATMEGA48V-10MU

Manufacturer Part NumberATMEGA48V-10MU
DescriptionIC AVR MCU 4K 10MHZ 1.8V 32-QFN
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA48V-10MU datasheets
 

Specifications of ATMEGA48V-10MU

Core ProcessorAVRCore Size8-Bit
Speed10MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o23
Program Memory Size4KB (2K x 16)Program Memory TypeFLASH
Eeprom Size256 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)1.8 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFNPackage32MLF EP
Device CoreAVRFamily NameATmega
Maximum Speed10 MHzOperating Supply Voltage2.5|3.3|5 V
Data Bus Width8 BitNumber Of Programmable I/os23
Interface TypeSPI/TWI/USARTOn-chip Adc8-chx10-bit
Number Of Timers3Processor SeriesATMEGA48x
CoreAVR8Data Ram Size512 B
Maximum Clock Frequency10 MHzMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWAVR, EWAVR-BL
Minimum Operating Temperature- 40 CController Family/seriesAVR MEGA
No. Of I/o's23Eeprom Memory Size256Byte
Ram Memory Size512ByteCpu Speed10MHz
No. Of Timers3Rohs CompliantYes
For Use WithATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMLead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 16/378

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7. AVR Memories
7.1
Overview
This section describes the different memories in the ATmega48/88/168. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the ATmega48/88/168 features an EEPROM Memory for data storage. All three memory spaces
are linear and regular.
7.2
In-System Reprogrammable Flash Program Memory
The ATmega48/88/168 contains 4K/8K/16K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2K/4K/8K × 16. For software security, the Flash Program memory space is divided into
two sections, Boot Loader Section and Application Program Section in ATmega88 and
ATmega168. ATmega48 does not have separate Boot Loader and Application Program sec-
tions, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section
266
and
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48/88/168 Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2K/4K/8K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
on page 261
ATmega168” on page
on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
ATmega48/88/168
16
“SPMCSR – Store Program Memory Control and Status Register” on page
page
282for more details.
and
“Boot Loader Support – Read-While-Write Self-Programming, ATmega88 and
268.
“Memory Programming” on page 284
13.
“Self-Programming the Flash, ATmega48”
contains a detailed description
“Instruction Execution Tim-
2545S–AVR–07/10