IC AVR MCU 4K 10MHZ 1.8V 32-QFN

ATMEGA48V-10MU

Manufacturer Part NumberATMEGA48V-10MU
DescriptionIC AVR MCU 4K 10MHZ 1.8V 32-QFN
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA48V-10MU datasheets
 


Specifications of ATMEGA48V-10MU

Core ProcessorAVRCore Size8-Bit
Speed10MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o23
Program Memory Size4KB (2K x 16)Program Memory TypeFLASH
Eeprom Size256 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)1.8 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFNPackage32MLF EP
Device CoreAVRFamily NameATmega
Maximum Speed10 MHzOperating Supply Voltage2.5|3.3|5 V
Data Bus Width8 BitNumber Of Programmable I/os23
Interface TypeSPI/TWI/USARTOn-chip Adc8-chx10-bit
Number Of Timers3Processor SeriesATMEGA48x
CoreAVR8Data Ram Size512 B
Maximum Clock Frequency10 MHzMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWAVR, EWAVR-BL
Minimum Operating Temperature- 40 CController Family/seriesAVR MEGA
No. Of I/o's23Eeprom Memory Size256Byte
Ram Memory Size512ByteCpu Speed10MHz
No. Of Timers3Rohs CompliantYes
For Use WithATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMLead Free Status / RoHS StatusLead free / RoHS Compliant
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Table 21-5.
Status Codes for Slave Transmitter Mode
Status Code
(TWSR)
Status of the 2-wire Serial Bus
Prescaler
and 2-wire Serial Interface Hard-
Bits
ware
are 0
0xA8
Own SLA+R has been received;
ACK has been returned
0xB0
Arbitration lost in SLA+R/W as
Master; own SLA+R has been
received; ACK has been returned
0xB8
Data byte in TWDR has been
transmitted; ACK has been
received
0xC0
Data byte in TWDR has been
transmitted; NOT ACK has been
received
0xC8
Last data byte in TWDR has been
transmitted (TWEA = “0”); ACK
has been received
ATmega48/88/168
232
Application Software Response
To TWCR
To/from TWDR
STA
STO
TWIN
T
Load data byte or
X
0
1
Load data byte
X
0
1
Load data byte or
X
0
1
Load data byte
X
0
1
Load data byte or
X
0
1
Load data byte
X
0
1
No TWDR action or
0
0
1
No TWDR action or
0
0
1
No TWDR action or
1
0
1
No TWDR action
1
0
1
No TWDR action or
0
0
1
No TWDR action or
0
0
1
No TWDR action or
1
0
1
No TWDR action
1
0
1
TWE
Next Action Taken by TWI Hardware
A
0
Last data byte will be transmitted and NOT ACK should
be received
1
Data byte will be transmitted and ACK should be re-
ceived
0
Last data byte will be transmitted and NOT ACK should
be received
1
Data byte will be transmitted and ACK should be re-
ceived
0
Last data byte will be transmitted and NOT ACK should
be received
1
Data byte will be transmitted and ACK should be re-
ceived
0
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
1
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
0
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
1
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
0
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
1
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
0
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
1
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
2545S–AVR–07/10