PIC24F16KA102-I/ML Microchip Technology, PIC24F16KA102-I/ML Datasheet - Page 3

• Manufacturer Part Number: PIC24F16KA102-I/ML
• Description: IC PIC MCU FLASH 16K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 16KB (5.5K x 24)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 512 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Power Management Modes:
• Run – CPU, Flash, SRAM and Peripherals On
• Doze – CPU Clock Runs Slower than Peripherals
• Idle – CPU Off, Flash, SRAM and Peripherals On
• Sleep – CPU, Flash and Peripherals Off and SRAM
• Deep Sleep – CPU, Flash, SRAM and
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 4x PLL Option and
• 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16-Bit x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
Peripheral Features:
• Hardware Real-Time Clock and Calendar (RTCC):
• Programmable Cyclic Redundancy Check (CRC)
• Serial Communication modules:
• Three 16-Bit Timers/Counters with Programmable
• 16-Bit Capture Inputs
• 16-Bit Compare/PWM Output
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
© 2009 Microchip Technology Inc.
08KA101
16KA101
08KA102
16KA102
PIC24F
Device
On
Most Peripherals Off
- Run mode currents down to 8 μA typical
- Idle mode currents down to 2 μA typical
- Deep Sleep mode currents down to 20 nA typical
- RTCC 490 nA, 32 kHz, 1.8V
- Watchdog Timer 350 nA, 1.8V typical
Multiple Divide Options
- Provides clock, calendar and alarm functions
- Can run in Deep Sleep Mode
- SPI, I
20/28-Pin General Purpose, 16-Bit Flash Microcontrollers
Prescaler
2
C™ and two UART modules
20
20
28
28
16K
16K
8K
8K
with nanoWatt XLP™ Technology
1.5K
1.5K
1.5K
1.5K
512
512
512
512
PIC24F16KA102 FAMILY
3
3
3
3
Preliminary
1
1
1
1
Analog Features:
• 10-Bit, up to 9-Channel Analog-to-Digital Converter:
• Dual Analog Comparators with Programmable Input/
• Charge Time Measurement Unit (CTMU):
Special Microcontroller Features:
• Operating Voltage Range of 1.8V to 3.6V
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
• Flash Program Memory:
• Data EEPROM:
• Fail-Safe Clock Monitor
• System Frequency Range Declaration bits:
• Flexible Watchdog Timer (WDT) with On-Chip,
• In-Circuit Serial Programming™ (ICSP™) and
• Programmable High/Low-Voltage Detect (HLVD)
• Brown-out Reset (BOR):
• Extreme Low-Power DSBOR for Deep Sleep,
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
Output Configuration
- Used for capacitance sensing
- Time measurement, down to 1 ns resolution
- Delay/pulse generation, down to 1 ns resolution
- Erase/write cycles: 10,000 minimum
- 40-years’ data retention minimum
- Erase/write cycles: 100,000 minimum
- 40-years’ data retention minimum
- Declaring the frequency range optimizes the current
Low-Power RC Oscillator for Reliable Operation
In-Circuit Debug (ICD) via two Pins
- Standard BOR with three programmable trip points;
LPBOR for all other modes
1
1
1
1
consumption.
can be disabled in Sleep
2
2
2
2
1
1
1
1
1
1
1
1
9
9
9
9
DS39927B-page 1
2
2
2
2
9
9
9
9
Y
Y
Y
Y