ATMEGA48P-20MU Atmel, ATMEGA48P-20MU Datasheet

MCU AVR 4K ISP FLASH 20MHZ 32QFN

ATMEGA48P-20MU

Manufacturer Part Number
ATMEGA48P-20MU
Description
MCU AVR 4K ISP FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48P-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48P-20MU
Manufacturer:
ATMEL
Quantity:
2 356
Features
Note:
High Performance, Low Power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Temperature Range:
Speed Grade:
Low Power Consumption at 1 MHz, 1.8V, 25°C:
– 131 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 4/8/16K Bytes of In-System Self-Programmable Flash progam memory
– 256/512/512 Bytes EEPROM
– 512/1K/1K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
– 6-channel 10-bit ADC in PDIP Package
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Byte-oriented 2-wire Serial Interface (Philips I
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– 23 Programmable I/O Lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
– 1.8 - 5.5V for ATmega48P/88P/168PV
– 2.7 - 5.5V for ATmega48P/88P/168P
– -40
– ATmega48P/88P/168PV: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
– ATmega48P/88P/168P: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V
– Active Mode: 0.3 mA
– Power-down Mode: 0.1 µA
– Power-save Mode: 0.8 µA (Including 32 kHz RTC)
Mode
and Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Temperature Measurement
Temperature Measurement
1. See
°
C to 85
”Data Retention” on page 7
°
C
®
8-Bit Microcontroller
for details.
2
C compatible)
(1)
8-bit
Microcontroller
with 4/8/16K
Bytes In-System
Programmable
Flash
ATmega48P/V
ATmega88P/V
ATmega168P/V
Summary
Rev. 8025LS–AVR–7/10

Related parts for ATMEGA48P-20MU

ATMEGA48P-20MU Summary of contents

Page 1

... • Speed Grade: – ATmega48P/88P/168PV MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega48P/88P/168P MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Low Power Consumption at 1 MHz, 1.8V, 25°C: – Active Mode: 0.3 mA – Power-down Mode: 0.1 µA – Power-save Mode: 0.8 µA (Including 32 kHz RTC) Note: 1 ...

Page 2

... Pin Configurations Figure 1-1. Pinout ATmega48P/88P/168P TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 VCC 3 GND 4 (PCINT6/XTAL1/TOSC1) PB6 5 (PCINT7/XTAL2/TOSC2) PB7 6 (PCINT21/OC0B/T1) PD5 7 NOTE: Bottom pad should be soldered to ground. ...

Page 3

... The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. 8025LS–AVR–7/10 ”System Clock and Clock Options” on page Table 28-3 on page ATmega48P/88P/168P ”Alternate Functions of Port B” on page 26. 313. Shorter pulses are not guaran- ”Alternate Functions of Port C” on page ...

Page 4

... These pins are powered from the analog supply and serve as 10-bit ADC channels. 2. Overview The ATmega48P/88P/168P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48P/88P/168P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 8025LS– ...

Page 5

... USART 0 PORT D (8) 8025LS–AVR–7/10 Power Timer Supervision POR / BOD & RESET Flash Clock 16bit T/C 1 Analog Comp. SPI PORT B (8) PD[0..7] PB[0..7] ATmega48P/88P/168P debugWIRE PROGRAM LOGIC SRAM CPU AVCC AREF GND 2 A/D Conv. Internal 6 Bandgap TWI PORT C (7) RESET XTAL[1 ...

Page 6

... Atmel ATmega48P/88P/168P is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega48P/88P/168P AVR is supported with a full suite of program and system develop- ment tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ...

Page 7

... In ATmega48P, there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash. 8025LS–AVR–7/10 ATmega48P/88P/168P 7 ...

Page 8

... For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”. 8025LS–AVR–7/10 1. ATmega48P/88P/168P 8 ...

Page 9

... USART I/O Data Register USART Baud Rate Register Low – – – UMSEL00 UPM01 UPM00 USBS0 ATmega48P/88P/168P Bit 2 Bit 1 Bit 0 – – – – – – – – – – – – – ...

Page 10

... Timer/Counter1 - Input Capture Register Low Byte Timer/Counter1 - Counter Register High Byte Timer/Counter1 - Counter Register Low Byte – – – FOC1B – – ICES1 – WGM13 WGM12 COM1A0 COM1B1 COM1B0 ATmega48P/88P/168P Bit 2 Bit 1 Bit 0 UCSZ02 RXB80 TXB80 UPE0 U2X0 MPCM0 – – – – – – ...

Page 11

... WGM02 COM0A0 COM0B1 COM0B0 – – – (EEPROM Address Register High Byte) EEPROM Address Register Low Byte EEPROM Data Register – EEPM1 EEPM0 General Purpose I/O Register 0 ATmega48P/88P/168P Bit 3 Bit 2 Bit 1 Bit 0 – – AIN1D AIN0D ADC2D ADC1D ADC0D – – ...

Page 12

... When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega48P/88P/168P is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...

Page 13

... PC ← then PC ← then PC ← then PC ← then PC ← ⊕ then PC ← ⊕ then PC ← then PC ← then PC ← then PC ← then PC ← then PC ← then PC ← ATmega48P/88P/168P Operation Flags Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V ...

Page 14

... Y ← (Y) ← ← Rr (Z) ← Rr (Z) ← Rr, Z ← ← (Z) ← ← Rr (k) ← ← (Z) Rd ← (Z) Rd ← (Z), Z ← Z+1 (Z) ← R1:R0 Rd ← ← Rr STACK ← Rr ATmega48P/88P/168P Operation Flags None None None None Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V None SREG(s) ...

Page 15

... Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168P. 8025LS–AVR–7/10 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ATmega48P/88P/168P Operation Flags None None None None None #Clocks 2 1 ...

Page 16

... Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP) 8025LS–AVR–7/10 (2) Ordering Code ATmega48PV-10AU ATmega48PV-10MMU ATmega48PV-10MU ATmega48PV-10PU ATmega48P-20AU ATmega48P-20MMU ATmega48P-20MU ATmega48P-20PU and Figure 28-2 on page 311. Package Type ATmega48P/88P/168P (1) Package Operational Range 32A 28M1 Industrial ° ...

Page 17

... Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8025LS–AVR–7/10 (2) Ordering Code ATmega88PV-10AU ATmega88PV-10MU ATmega88PV-10PU ATmega88P-20AU ATmega88P-20MU ATmega88P-20PU and Figure 28-2 on page 311. Package Type ATmega48P/88P/168P (1) Package Operational Range 32A Industrial 32M1-A ° (- 28P3 32A Industrial 32M1-A ° ...

Page 18

... Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8025LS–AVR–7/10 (2) Ordering Code ATmega168PV-10AU ATmega168PV-10MU ATmega168PV-10PU ATmega168P-20AU ATmega168P-20MU ATmega168P-20PU and Figure 28-2 on page 311. Package Type ATmega48P/88P/168P (1) Package Operational Range 32A Industrial 32M1-A ° (- 28P3 32A Industrial 32M1-A ° ...

Page 19

... Orchard Parkway San Jose, CA 95131 R 8025LS–AVR–7/10 B PIN 1 IDENTIFIER TITLE 32A, 32-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega48P/88P/168P A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 20

... Package Drawing Contact: packagedrawings@atmel.com 8025LS–AVR–7/ TITLE 28M1, 28-pad 1.0 mm Body, Lead Pitch 0.45 mm, 2.4 x 2.4 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ATmega48P/88P/168P C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 0.80 0.90 1 ...

Page 21

... San Jose, CA 95131 R 8025LS–AVR–7/ TITLE 32M1-A, 32-pad 1.0 mm Body, Lead Pitch 0.50 mm, 3.10 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega48P/88P/168P SIDE VIEW A3 A1 COMMON DIMENSIONS 0.08 C (Unit of Measure = mm) MIN NOM MAX SYMBOL A 0.80 0.90 1.00 A1 – 0.02 0.05 A2 – ...

Page 22

... Orchard Parkway San Jose, CA 95131 R 8025LS–AVR–7/10 D PIN PLACES 0º ~ 15º REF eB TITLE 28P3, 28-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) ATmega48P/88P/168P E1 A1 COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM MAX A – – 4.5724 A1 0.508 – D 34.544 – ...

Page 23

... Errata 10.1 Errata ATmega48P The revision letter in this section refers to the revision of the ATmega48P device. 10.1.1 Rev known errata. 10.1.2 Rev known errata. 10.1.3 Rev. A Not Sampled. 10.2 Errata ATmega88P The revision letter in this section refers to the revision of the ATmega88P device. ...

Page 24

... Added Power-save Maximum values and footnote to tics” on page 310. Added Power-save Maximum values and footnote to Added errata for revision A, ”” on page ATmega48P/88P not recommended for new designs. Updated the footnote Note1 of the Updated the Table 8-5 on page 30 Updated the Table 8-10 on page 33 ...

Page 25

... Grades” on page Updated note in Table 28-4 in ”System and Reset Characteristics” on page ATmega48P/88P/168P ”ATmega48P DC Characteristics” on page 309 ”ATmega88P DC Characteristics” on page 310 ”ATmega168P DC Characteristics” on page 310 ”” on page 311 and removed TBD from the table. Table 28-4 on page 313 ...

Page 26

... Characteristics” on page OL Updated max value for V in ”DC Characteristics” on page IL2 Added ”ATmega48P DC Characteristics” on page tics” on page 310, and ”ATmega168P DC Characteristics” on page Updated ”System and Reset Characteristics” on page Added ”ATmega48P Typical Characteristics” on page Characteristics” ...

Page 27

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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