DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet
DSPIC33FJ12MC201-I/SO
Specifications of DSPIC33FJ12MC201-I/SO
Related parts for DSPIC33FJ12MC201-I/SO
DSPIC33FJ12MC201-I/SO Summary of contents
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... Table 1. The silicon issues are summarized in Table 2. The errata described in this document will be addressed in future revisions of the dsPIC33FJ12MC201/202 silicon. Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated in the last column of ...
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... PSV page. 2 When the I C module is configured as a 10-bit slave with an address of 0x102, the I2CxRCV register content for the lower address byte is 0x01 rather than 0x02. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
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... Consumption in Sleep Mode Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. Issue Summary 2 With the I C module enabled, the port bits and external interrupt input functions (if any) associated with SCL and SDA pins do not reflect the actual digital logic levels on the pins ...
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... When an auto-baud is detected, the receive interrupt may occur twice. The first interrupt occurs at the beginning of the Start bit and the second after reception of the Sync field character. Work around If an extra interrupt is detected, ignore the additional interrupt. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
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... Service Routine must be included in the user application. Affected Silicon Revisions © 2010 Microchip Technology Inc. 10. Module: SPI Setting the DISSCK bit in the SPIxCON1 register does not allow the user application to use the SCK pin as a General Purpose I/O pin. Work around None. Affected Silicon Revisions ...
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... Work around If the SDA and/or SCL pins need to be polled, these pins should be connected to other port pins in order to be read correctly. This issue does not 2 affect the operation of the I C module. Affected Silicon Revisions © 2010 Microchip Technology Inc. the module (if any) ...
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... Store the value of the ACKSTAT bit immediately after receiving a NACK. Affected Silicon Revisions © 2010 Microchip Technology Inc. 22. Module: CPU The EXCH instruction does not execute correctly. Work around addresses writing recommended work around is to replace: EXCH Wsource, Wdestination with: PUSH Wdestination ...
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... Break character. Break characters are generated correctly if they are followed by non-Break character transmission. Work around None. Affected Silicon Revisions shows the // Instead of 0xFFFF // Clear QEI interrupt flag // x=2 for dsPIC30F // x=3 for dsPIC33F © 2010 Microchip Technology Inc. ...
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... X EXAMPLE 2: AD1CON1bits.ADON = 0; __asm__ volatile ("REPEAT #50"); __asm__ volatile ("NOP"); Sleep(); © 2010 Microchip Technology Inc. 30. Module: ADC If the ADC module enabled state when the device enters Sleep mode as a result of executing a PWRSAV #0 instruction, the device power-down current (I in the device data sheet. This may happen even if the ADC module is disabled by clearing the ADON bit prior to entering Sleep mode ...
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... T -40°C ≤ T Min Typ Max Units V — 0 — 0.8 SS 0.7 V — 5.5 DD 2.1 — 5.5 ≤ +85°C for Industrial A ≤+125°C for Extended A Conditions V SMBus disabled V SMBus enabled V SMBus disabled V SMBus enabled © 2010 Microchip Technology Inc. ...
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... Voltage Regulator), 17 (PSV Operations), 18-21 23-24 (PWM) and 25 (QEI). This document replaces the following errata document: DS80328, “dsPIC33FJ12MC201/202 Rev. A2/A3/A4 Silicon Errata” Rev B Document (8/2009) Added silicon issues 26 (UART) and 27-28 (QEI). Rev C Document (1/2010) Added silicon issue 29 (SPI). ...
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... NOTES: DS80461E-page 12 © 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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