DSPIC30F3012-30I/SO Microchip Technology, DSPIC30F3012-30I/SO Datasheet - Page 135

IC DSPIC MCU/DSP 24K 18SOIC

DSPIC30F3012-30I/SO

Manufacturer Part Number
DSPIC30F3012-30I/SO
Description
IC DSPIC MCU/DSP 24K 18SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3012-30I/SO

Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Package
18SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301230ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3012-30I/SO
Manufacturer:
Microchip Technology
Quantity:
1 798
Part Number:
DSPIC30F3012-30I/SO
Manufacturer:
MICRCOHI
Quantity:
20 000
17.8
The Peripheral Module Disable (PMD) registers
provide a method to disable a peripheral module by
stopping all clock sources supplied to that module.
When a peripheral is disabled via the appropriate PMD
control bit, the peripheral is in a minimum power
consumption state. The Control and Status registers
associated with the peripheral will also be disabled so
writes to those registers will have no effect and read
values will be invalid.
A peripheral module will only be enabled if both the
associated bit in the PMD register is cleared and the
peripheral is supported by the specific dsPIC DSC
variant. If the peripheral is present in the device, it is
enabled in the PMD register by default.
© 2010 Microchip Technology Inc.
Note 1: If a PMD bit is set, the corresponding
2: In dsPIC30F2011, dsPIC30F3012 and
Peripheral Module Disable (PMD)
Registers
module is disabled after a delay of 1
instruction cycle. Similarly, if a PMD bit is
cleared, the corresponding module is
enabled after a delay of 1 instruction
cycle (assuming the module Control reg-
isters are already configured to enable
module operation).
dsPIC30F2012 devices, the U2MD bit is
readable and writable and will be read as
‘1’ when set.
dsPIC30F2011/2012/3012/3013
17.9
When MPLAB
In-Circuit Debugging functionality is enabled. This
function allows simple debugging functions when used
with MPLAB IDE. When the device has this feature
enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of Data RAM and two I/O pins.
One of four pairs of Debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These
EMUD1/EMUC1,
EMUD3/EMUC3.
In each case, the selected EMUD pin is the
Emulation/Debug Data line, and the EMUC pin is the
Emulation/Debug Clock line. These pins will interface
to the MPLAB ICD 2 module available from Microchip.
The selected pair of Debug I/O pins is used by MPLAB
ICD 2 to send commands and receive responses, as
well as to send and receive data. To use the In-Circuit
Debugger function of the device, the design must
implement ICSP connections to MCLR, V
PGC, PGD and the selected EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
2.
If EMUD/EMUC is selected as the Debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
If
EMUD3/EMUC3 is selected as the Debug I/O
pin pair, then a 7-pin interface is required, as the
EMUDx/EMUCx pin functions (x = 1, 2 or 3) are
not multiplexed with the PGD and PGC pin
functions.
In-Circuit Debugger
pin
EMUD1/EMUC1,
®
pairs
ICD 2 is selected as a Debugger, the
are
EMUD2/EMUC2
named
EMUD2/EMUC2
DS70139G-page 135
EMUD/EMUC,
DD
, V
or
and
SS
,

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