PIC18LF2410-I/SO Microchip Technology, PIC18LF2410-I/SO Datasheet

IC MCU FLASH 8KX16 28SOIC

PIC18LF2410-I/SO

Manufacturer Part Number
PIC18LF2410-I/SO
Description
IC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2410-I/SO

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Interface
I2C, SPI, USART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2410-I/SO
Manufacturer:
TOSHIBA
Quantity:
3 000
Part Number:
PIC18LF2410-I/SO
Manufacturer:
MICROHIP
Quantity:
1 000
The PIC18F2410/2510/4410/4510 Rev. B3 parts you
have received conform functionally to the Device Data
Sheet
described below. Any Data Sheet Clarification issues
related to the PIC18F2410/2510/4410/4510 will be
reported in a separate Data Sheet errata. Please check
the Microchip web site for any existing issues.
The
PIC18F2410/2510/4410/4510 devices with these
Device/Revision IDs:
All of the issues listed here will be addressed in future
revisions of the PIC18F2410/2510/4410/4510 silicon.
1. Module: MSSP
TABLE 1:
© 2007 Microchip Technology Inc.
Param
70
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
No.
Part Number
PIC18F2410
PIC18F2510
PIC18F4410
PIC18F4510
In SPI Slave mode with slave select enabled
(SSPM<3:0> = 0100), the minimum time between
the falling edge of the SS pin and first SCK edge
is greater than specified in parameter 70 in
Table 25-16 and Table 25-17 of the above
referenced data sheet.
The updated specification is shown in bold in
Table 1.
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
following
(DS39636C),
T
T
PIC18F2410/2510/4410/4510 Rev. B3 Silicon Errata
SS
SS
Symbol
L2
L2
3FFFFEh:3FFFFFh
SC
SC
EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING)
H,
L
silicon
0001 0001 011
0001 0001 001
0001 0000 101
0001 0000 111
SS ↓ to SCK ↓ or SCK ↑ Input
Device ID
except
errata apply
for
in
the
PIC18F2410/2510/4410/4510
Revision ID
the
Characteristic
0 0110
0 0110
0 0110
0 0110
anomalies
only
device’s
to
2. Module: MSSP (SPI Mode)
FIGURE 1:
EXAMPLE 1:
LOOP BTFSS SSPSTAT, BF
When the SPI is using Timer2/2 as the clock
source, a shorter than expected SCK pulse may
occur on the first bit of the transmitted/received
data (Figure 1).
Work around
To avoid producing the short pulse, turn off Timer2
and clear the TMR2 register, load the SSPBUF
with the data to transmit and then turn Timer2 back
on. Refer to Example 1 for sample code.
Date Codes that pertain to this issue:
All engineering and production devices.
SDO
SCK
BRA
MOVF
MOVWF RXDATA
MOVF
BCF
CLRF
MOVWF SSPBUF
BSF
Write SSPBUF
LOOP
SSPBUF, W
TXDATA, W
T2CON, TMR2ON
TMR2
T2CON, TMR2ON
3 T
Min
bit 0 = 1 bit 1 = 0
SCK PULSE VARIATION
USING TIMER2/2
AVOIDING THE INITIAL
SHORT SCK PULSE
CY
Max Units Conditions
;Data received?
;(Xmit complete?)
;No
;W = SSPBUF
;Save in user RAM
;W = TXDATA
;Timer2 off
;Clear Timer2
;Xmit New data
;Timer2 on
bit 2 = 1 . . . .
ns
DS80314B-page 1

Related parts for PIC18LF2410-I/SO

PIC18LF2410-I/SO Summary of contents

Page 1

... SS ↓ to SCK ↓ or SCK ↑ Input © 2007 Microchip Technology Inc. PIC18F2410/2510/4410/4510 2. Module: MSSP (SPI Mode) When the SPI is using Timer2/2 as the clock the anomalies source, a shorter than expected SCK pulse may occur on the first bit of the transmitted/received data (Figure 1). FIGURE 1: only to ...

Page 2

... TX and RX signals to be inverted (polarity reversed). Register 17-3, on page 194, will be changed as shown on page 3. Work around None required. Date Codes that pertain to this issue: All engineering and production devices. DS80314B-page 2 and RXDTP © 2007 Microchip Technology Inc. ...

Page 3

... ABDEN: Auto-Baud Detect Enable bit Asynchronous mode Enable baud rate measurement on the next character. Requires reception of a Sync field (55h); cleared in hardware upon completion Baud rate measurement disabled or completed Synchronous mode: Unused in this mode. © 2007 Microchip Technology Inc. PIC18F2410/2510/4410/4510 R/W-0 R/W-0 U-0 TXCKP BRG16 — ...

Page 4

... REVISION HISTORY Rev A Document (4/2007) Initial revision of this document. Silicon issue 1 (MSSP), OSC 2 (MSSP – SPI Mode) and 3 (Enhanced Universal Synchronous Receiver Transmitter – EUSART). Rev B Document (8/2007) Added silicon issue 4 (10-Bit A/D Converter). , OSC ) and avoid © 2007 Microchip Technology Inc. ...

Page 5

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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