PIC18LF2410-I/SO Microchip Technology, PIC18LF2410-I/SO Datasheet - Page 142

IC MCU FLASH 8KX16 28SOIC

PIC18LF2410-I/SO

Manufacturer Part Number
PIC18LF2410-I/SO
Description
IC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2410-I/SO

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Interface
I2C, SPI, USART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2410-I/SO
Manufacturer:
TOSHIBA
Quantity:
3 000
Part Number:
PIC18LF2410-I/SO
Manufacturer:
MICROHIP
Quantity:
1 000
PIC18F2X1X/4X1X
15.4.4
In the Half-Bridge Output mode, two pins are used as
outputs to drive push-pull loads. The PWM output
signal is output on the P1A pin, while the complemen-
tary PWM output signal is output on the P1B pin
(Figure 15-4). This mode can be used for half-bridge
applications, as shown in Figure 15-5, or for full-bridge
applications where four power switches are being
modulated with two PWM signals.
In Half-Bridge Output mode, the programmable dead-
band delay can be used to prevent shoot-through
current in half-bridge power devices. The value of bits
PDC6:PDC0 sets the number of instruction cycles
before the output is driven active. If the value is greater
than the duty cycle, the corresponding output remains
inactive during the entire cycle. See Section 15.4.6
“Programmable Dead-Band Delay” for more details
of the dead-band delay operations.
Since the P1A and P1B outputs are multiplexed with
the PORTC<2> and PORTD<5> data latches, the
TRISC<2> and TRISD<5> bits must be cleared to
configure P1A and P1B as outputs.
FIGURE 15-5:
DS39636D-page 144
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
HALF-BRIDGE MODE
EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS
PIC18F4X1X
P1A
P1B
PIC18F4X1X
P1A
P1B
FET
Driver
FET
Driver
FET
Driver
FET
Driver
FIGURE 15-4:
Note 1: At this time, the TMR2 register is equal to the
P1A
P1B
td = Dead-Band Delay
(2)
(2)
2: Output signals are shown as active-high.
(1)
Load
V+
PR2 register.
V-
Duty Cycle
td
V+
V-
Period
Load
td
HALF-BRIDGE PWM
OUTPUT
© 2009 Microchip Technology Inc.
FET
Driver
FET
Driver
(1)
+
V
-
+
V
-
Period
(1)

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