PIC18LF2410-I/SO Microchip Technology, PIC18LF2410-I/SO Datasheet - Page 67

• Manufacturer Part Number: PIC18LF2410-I/SO
• Description: IC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410-I/SO

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 5-2:
© 2009 Microchip Technology Inc.
SPBRGH
SPBRG
RCREG
TXREG
TXSTA
RCSTA
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
Legend:
Note
File Name
(2)
(2)
(2)
(2)
(2)
1:
2:
3:
4:
5:
6:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is disabled and reads as ‘0’. See
Section 4.4 “Brown-out Reset (BOR)”.
These registers and/or bits are not implemented on 28-pin devices and are read as
individual unimplemented bits should be interpreted as ‘-’.
The PLLEN bit is only available in specific oscillator configuration; otherwise it is disabled and reads as
INTOSC Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0). Otherwise, RE3 reads as
read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
Bit 7 and bit 6 are cleared by user software or by a POR.
EUSART Transmit Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
EUSART Receive Register
PORTD Data Direction Control Register
PORTC Data Direction Control Register
PORTB Data Direction Control Register
PORTD Data Latch Register (Read and Write to Data Latch)
PORTC Data Latch Register (Read and Write to Data Latch)
PORTB Data Latch Register (Read and Write to Data Latch)
TRISA7
PSPIP
PSPIE
PSPIF
LATA7
OSCFIP
OSCFIF
OSCFIE
INTSRC
RA7
CSRC
SPEN
Bit 7
RD7
RC7
RB7
IBF
—
—
(5)
REGISTER FILE SUMMARY (PIC18F2X1X/4X1X) (CONTINUED)
(2)
(2)
(2)
(6)
(5)
TRISA6
PLLEN
LATA6
RA6
CMIP
CMIE
CMIF
ADIP
ADIF
ADIE
Bit 6
RX9
OBF
RD6
RC6
RB6
TX9
—
—
(5)
(6)
(3)
(5)
Data Direction Control Register for PORTA
PORTA Data Latch Register (Read and Write to Data Latch)
SREN
TXEN
RCIP
RCIE
IBOV
RCIF
Bit 5
RD5
RC5
RB5
RA5
—
—
—
—
—
—
PSPMODE
SYNC
CREN
TUN4
Bit 4
TXIP
TXIF
TXIE
RD4
RC4
RB4
RA4
—
—
—
—
—
ADDEN
SENDB
BCLIP
BCLIF
BCLIE
SSPIP
SSPIF
SSPIE
RE3
TUN3
Bit 3
RD3
RC3
RB3
RA3
—
—
(4)
PORTE Data Latch Register
(Read and Write to Data Latch)
CCP1IP
CCP1IF
CCP1IE
HLVDIP
HLVDIF
HLVDIE
TRISE2
BRGH
RE2
FERR
TUN2
Bit 2
RD2
RC2
RB2
RA2
PIC18F2X1X/4X1X
(2)
‘
0
’
. Reset values are shown for 40/44-pin devices;
TMR3IP
TMR3IE
TMR2IP
TMR2IE
TMR3IF
TMR2IF
TRISE1
OERR
RE1
TRMT
TUN1
Bit 1
RD1
RC1
RB1
RA1
(2)
CCP2IP
CCP2IE
TMR1IP
TMR1IF
TMR1IE
CCP2IF
TRISE0
RE0
RX9D
TUN0
TX9D
Bit 0
RD0
RC0
RB0
RA0
‘
0
’
. See Section 2.6.4 “PLL in
(2)
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
11-- 1111
00-- 0000
00-- 0000
1111 1111
0000 0000
0000 0000
0q-0 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xx0x 0000
POR, BOR
DS39636D-page 69
Value on
‘
0
’
. This bit is
on page:
Details
53, 197
53, 197
53, 204
53, 202
53, 194
53, 195
54, 110
54, 106
54, 103
54, 100
54, 109
54, 106
54, 103
54, 100
54, 109
54, 106
54, 103
54, 100
54, 93
54, 89
54, 91
54, 92
54, 88
54, 90
29, 54
54, 97
54, 97
54, 97