PIC18LF2410-I/SO Microchip Technology, PIC18LF2410-I/SO Datasheet - Page 83

• Manufacturer Part Number: PIC18LF2410-I/SO
• Description: IC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410-I/SO

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.1
The INTCON registers are readable and writable
registers, which contain various enable, priority and
flag bits.
REGISTER 8-1:
© 2009 Microchip Technology Inc.
INTCON Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON REGISTER
bit 7
GIE/GIEH: Global Interrupt Enable bit
When IPEN = 0:
1 = Enables all unmasked interrupts
0 = Disables all interrupts
When IPEN = 1:
1 = Enables all high priority interrupts
0 = Disables all interrupts
PEIE/GIEL: Peripheral Interrupt Enable bit
When IPEN = 0:
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
When IPEN = 1:
1 = Enables all low priority peripheral interrupts
0 = Disables all low priority peripheral interrupts
TMR0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 overflow interrupt
0 = Disables the TMR0 overflow interrupt
INT0IE: INT0 External Interrupt Enable bit
1 = Enables the INT0 external interrupt
0 = Disables the INT0 external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
TMR0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INT0IF: INT0 External Interrupt Flag bit
1 = The INT0 external interrupt occurred (must be cleared in software)
0 = The INT0 external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
Legend:
R = Readable bit
-n = Value at POR
GIE/GIEH
Note:
R/W-0
A mismatch condition will continue to set this bit. Reading PORTB will end the
mismatch condition and allow the bit to be cleared.
PEIE/GIEL
R/W-0
TMR0IE
W = Writable bit
‘1’ = Bit is set
R/W-0
INT0IE
R/W-0
Note:
PIC18F2X1X/4X1X
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
Interrupt flag bits are set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
interrupt enable bit. User software should
ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt.
This feature allows for software polling.
RBIE
TMR0IF
R/W-0
x = Bit is unknown
INT0IF
R/W-0
DS39636D-page 85
R/W-x
RBIF
bit 0