ATMEGA328P-AU Atmel, ATMEGA328P-AU Datasheet - Page 50

MCU AVR 32K FLASH 32TQFP

ATMEGA328P-AU

Manufacturer Part Number
ATMEGA328P-AU
Description
MCU AVR 32K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA328P-20AU
ATMEGA328P-20AU
Q3790246

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11.4
11.5
8271D–AVR–05/11
External Reset
Brown-out Detection
Figure 11-3. MCU Start-up, RESET Extended Externally
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see
reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
When the applied signal reaches the Reset Threshold Voltage – V
delay counter starts the MCU after the Time-out period – t
can be disabled by the RSTDISBL fuse, see
Figure 11-4. External Reset During Operation
ATmega48A/PA/88A/PA/168A/PA/328/P has an On-chip Brown-out Detection (BOD) circuit for
monitoring the V
for the BOD can be selected by the BODLEVEL Fuses. The trigger level has a hysteresis to
ensure spike free Brown-out Detection. The hysteresis on the detection level should be inter-
preted as V
decreases to a value below the trigger level (V
Reset is immediately activated. When V
5 on page
The BOD circuit will only detect a drop in V
ger than t
INTERNAL
TIME-OUT
RESET
RESET
BOD
V
51), the delay counter starts the MCU after the Time-out period t
CC
CC
BOT+
given in
= V
CC
level during operation by comparing it to a fixed trigger level. The trigger level
BOT
ATmega48A/PA/88A/PA/168A/PA/328/P
”System and Reset Characteristics” on page
+ V
HYST
V
”System and Reset Characteristics” on page
POT
/2 and V
BOT-
CC
increases above the trigger level (V
CC
= V
Table 28-7 on page
if the voltage stays below the trigger level for lon-
V
BOT
BOT-
RST
t
- V
TOUT
in
HYST
Figure 11-5 on page
TOUT
/2.When the BOD is enabled, and V
– has expired. The External Reset
299.
RST
324.
– on its positive edge, the
TOUT
324) will generate a
51), the Brown-out
BOT+
has expired.
in
Figure 11-
50
CC

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