DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 190

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
16.18 Module Power-Down Modes
The module has two internal power modes.
When the ADON bit is ‘1’, the module is in Active mode
and is fully powered and functional.
When ADON is ‘0’, the module is in Off mode. The state
machine for the module is reset, as are all of the
pending conversion requests.
To return to the Active mode from Off mode, the user
must wait for the bias generators to stabilize. The
stabilization time is specified in the electrical specs.
16.19 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the ADC module to be turned off, and any
conversion and sampling sequence is aborted. The
value that is in the ADCBUFx register is not modified.
The ADCBUFx registers contain unknown data after a
Power-on Reset.
DS70178C-page 188
Preliminary
16.20 Configuring Analog Port Pins
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins.
The port pins that are desired as analog inputs should
have their corresponding TRIS bit set (input). If the
TRIS bit is cleared (output), the digital output level (V
or V
Port pins that are desired as analog inputs must have
the corresponding ADPCFG bit clear. This will config-
ure the port to disable the digital input buffer. Analog
levels on pins where ADPCFG<n> = 1, may cause the
digital input buffer to consume excessive current.
If a pin is not configured as an analog input
ADPCFG<n> = 1, the analog input is forced to AVss,
and conversions of that input do not yield meaningful
results.
When reading the PORT register, all pins configured as
analog input ADPCFG<n> = 0 will read ‘0’.
The A/D operation is independent of the state of the
input selection bits and the TRIS bits.
16.21 Output Formats
The A/D converts 10 bits. The data buffer RAM is 16
bits wide. The ADC data can be read in one of two dif-
ferent formats, as shown in Figure 16-5. The FORM bit
selects the format. Each of the output formats
translates to a 16-bit result on the data bus.
OL
) will be converted.
© 2006 Microchip Technology Inc.
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