DSPIC33FJ16GS502-I/SO Microchip Technology, DSPIC33FJ16GS502-I/SO Datasheet - Page 157

• Manufacturer Part Number: DSPIC33FJ16GS502-I/SO
• Description: IC DSPIC MCU/DSP 16K 28-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 16KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

10.0
All of the device pins (except V
OSC1/CLKI) are shared among the peripherals and the
parallel I/O ports. All I/O input ports feature Schmitt
Trigger inputs for improved noise immunity.
10.1
Generally a parallel I/O port that shares a pin with a
peripheral is subservient to the peripheral. The
peripheral’s output buffer data and control signals are
provided to a pair of multiplexers. The multiplexers
select whether the peripheral or the associated port
has ownership of the output data and control signals of
the I/O pin. The logic also prevents “loop through”, in
which a port’s digital output can drive the input of a
FIGURE 10-1:
© 2009 Microchip Technology Inc.
Note:
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Parallel I/O (PIO) Ports
I/O PORTS
This data sheet summarizes the features
of
dsPIC33FJ16GSX02/X04
devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference Manual”, Section 10. “I/O
Ports” (DS70193), which is available on
Microchip web site (www.microchip.com).
the
Read PORT
Read LAT
Read TRIS
Data Bus
WR TRIS
WR LAT +
WR PORT
dsPIC33FJ06GS101/X02
BLOCK DIAGRAM OF A TYPICAL SHARED PORT STRUCTURE
Peripheral Output Enable
Peripheral Output Data
Peripheral Input Data
Peripheral Module Enable
Peripheral Module
PIO Module
DD
TRIS Latch
Data Latch
D
D
CK
CK
, V
SS
Q
families
Q
, MCLR and
and
Preliminary
To
of
Output Multiplexers
peripheral that shares the same pin. Figure 10-1 shows
how ports are shared with other peripherals and the
associated I/O pin to which they are connected.
When a peripheral is enabled and the peripheral is
actively driving an associated pin, the use of the pin as
a general purpose output pin is disabled. The I/O pin
can be read, but the output driver for the parallel port bit
is disabled. If a peripheral is enabled, but the peripheral
is not actively driving a pin, that pin can be driven by a
port.
All port pins have three registers directly associated
with their operation as digital I/O. The data direction
register (TRISx) determines whether the pin is an input
or an output. If the data direction bit is ‘1’, then the pin
is an input. All port pins are defined as inputs after a
Reset. Reads from the latch (LATx) read the latch.
Writes to the latch write the latch. Reads from the port
(PORTx) read the port pins, while writes to the port pins
write the latch.
Any bit and its associated data and control registers
that are not valid for a particular device will be
disabled. That means the corresponding LATx and
TRISx registers and the port pin will read as zeros.
When a pin is shared with another peripheral or
function that is defined as an input only, it is
nevertheless regarded as a dedicated port because
there is no other competing source of outputs.
1
0
1
0
Output Enable
Output Data
Input Data
I/O
I/O Pin
DS70318D-page 155