ATMEGA32A-PU Atmel, ATMEGA32A-PU Datasheet - Page 11

• Manufacturer Part Number: ATMEGA32A-PU
• Description: MCU AVR 32K FLASH 16MHZ 40-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Rom Size: 1024 B
• Height: 4.83 mm
• Length: 52.58 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 13.97 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.4.1
6.5
8155C–AVR–02/11
Stack Pointer
The X-register, Y-register and Z-register
The registers R26:R31 have some added functions to their general purpose usage. These regis-
ters are 16-bit address pointers for indirect addressing of the Data Space. The three indirect
address registers X, Y, and Z are defined as described in
Figure 6-3.
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the Instruction Set Reference for details).
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. Note that the Stack is implemented as
growing from higher to lower memory locations. The Stack Pointer Register always points to the
top of the Stack. The Stack Pointer points to the data SRAM Stack area where the Subroutine
and Interrupt Stacks are located. A Stack PUSH command will decrease the Stack Pointer.
The Stack in the data SRAM must be defined by the program before any subroutine calls are
executed or interrupts are enabled. Initial Stack Pointer value equals the last address of the
internal SRAM and the Stack Pointer must be set to point above start of the SRAM, see
7-2 on page
See
Table 6-1.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
X - register
Y - register
Z - register
Instruction
PUSH
CALL
ICALL
RCALL
POP
RET
RETI
Table 6-1 on page 11
18.
The X-, Y-, and Z-registers
Stack Pointer instructions
Stack pointer
Decremented by 1
Decremented by 2
Incremented by 1
Incremented by 2
15
7
R27 ($1B)
15
7
R29 ($1D)
15
7
R31 ($1F)
for Stack Pointer details.
Description
Data is pushed onto the stack
Return address is pushed onto the stack with a subroutine call or
interrupt
Data is popped from the stack
Return address is popped from the stack with return from
subroutine or return from interrupt
XH
YH
ZH
0
0
0
7
R26 ($1A)
7
R28 ($1C)
7
R30 ($1E)
Figure
6-3.
XL
YL
ZL
0
ATmega32A
0
0
0
0
0
Figure
11