DSPIC30F3011-30I/PT Microchip Technology, DSPIC30F3011-30I/PT Datasheet - Page 102

• Manufacturer Part Number: DSPIC30F3011-30I/PT
• Description: IC DSPIC MCU/DSP 24K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3011-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 24KB (8K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Data Ram Size: 1024 B
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301130IPT

Complementary mode by default upon a device Reset.
dsPIC30F3010/3011
When the PWM time base is in the Continuous Up/
Down Count mode with double updates, new duty cycle
values are updated when the value of the PTMR regis-
ter is zero, and when the value of the PTMR register
matches the value in the PTPER register. The contents
of the duty cycle buffers are automatically loaded into
the Duty Cycle registers when the PWM time base is
disabled (PTEN = 0).
15.6
In the Complementary mode of operation, each pair of
PWM outputs is obtained by a complementary PWM
signal. A dead time may be optionally inserted during
device switching, when both outputs are inactive for a
short period (Refer to
Generators”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PDC1 register controls PWM1H/PWM1L outputs
• PDC2 register controls PWM2H/PWM2L outputs
• PDC3 register controls PWM3H/PWM3L outputs
The Complementary mode is selected for each PWM
I/O pin pair by clearing the appropriate PMODx bit in the
PWMCON1 SFR. The PWM I/O pins are set to
15.7
Dead-time generation may be provided when any of the
PWM I/O pin pairs are operating in the Complementary
Output mode. The PWM outputs use push-pull drive cir-
cuits. Due to the inability of the power output devices to
switch instantaneously, some amount of time must be
provided between the turn-off event of one PWM output
in a complementary pair and the turn-on event of the
other transistor.
The PWM module allows two different dead times to be
programmed. These two dead times may be used in
one of two methods described below to increase user
flexibility:
• The PWM output signals can be optimized for
• The two dead times can be assigned to individual
DS70141F-page 102
different turn-off times in the high side and low
side transistors in a complementary pair of
transistors. The first dead time is inserted
between the turn-off event of the lower transistor
of the complementary pair and the turn-on event
of the upper transistor. The second dead time is
inserted between the turn-off event of the upper
transistor and the turn-on event of the lower
transistor.
PWM I/O pin pairs. This operating mode allows
the PWM module to drive different transistor/load
combinations with each complementary PWM I/O
pin pair.
Complementary PWM Operation
Dead-Time Generators
Section 15.7 “Dead-Time
15.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.
15.7.2
The amount of dead time provided by the dead-time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value.
Four input clock prescaler selections have been pro-
vided to allow a suitable range of dead time, based on
the device operating frequency. The dead-time clock
prescaler values are selected using the DTAPS<1:0>
control bits in the DTCON1 SFR. One of four clock
prescaler options (T
selected.
After the prescaler value is selected, the dead time is
adjusted by loading 6-bit unsigned values into the
DTCON1 SFR.
The dead-time unit prescaler is cleared on the following
events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON1 register.
• On any device Reset.
comparison edge event.
Note:
DEAD-TIME GENERATORS
DEAD-TIME RANGES
The user should not modify the DTCON1
value while the PWM module is operating
(PTEN = 1). Unexpected results may
occur.
CY
, 2 T
© 2010 Microchip Technology Inc.
CY
, 4 T
CY
Figure
or 8 T
CY
15-4, each
) may be