DSPIC30F3011-30I/PT Microchip Technology, DSPIC30F3011-30I/PT Datasheet - Page 153

IC DSPIC MCU/DSP 24K 44TQFP

DSPIC30F3011-30I/PT

Manufacturer Part Number
DSPIC30F3011-30I/PT
Description
IC DSPIC MCU/DSP 24K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3011-30I/PT

Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Data Ram Size
1024 B
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301130IPT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3011-30I/PT
Manufacturer:
MICROCHIP
Quantity:
316
Part Number:
DSPIC30F3011-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F3011-30I/PT
Manufacturer:
MICROCHI
Quantity:
20 000
Part Number:
DSPIC30F3011-30I/PT
0
TABLE 20-7:
TABLE 20-8:
RCON
OSCCON 0742
OSCTUN
Legend:
Note 1:
FOSC
FWDT
FBORPOR F80004
FBS
FSS
FGS
FICD
Legend:
Note
Name
SFR
Name
1:
2:
3:
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual “(DS70046) for descriptions of register bit fields.
Addr. Bit 15
0740 TRAPR IOPUWR BGST
0744
Address
F80000
F80002
F80006
F80008
F8000A
F8000C
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual “(DS70046) for descriptions of register bit fields.
Reserved bits read as ‘1’ and must be programmed as ‘1’.
The FGS<2> bit is a read-only copy of the GCP bit (FGS<1>).
SYSTEM INTEGRATION REGISTER MAP
DEVICE CONFIGURATION REGISTER MAP
FWDTEN
MCLREN
BKBUG
Bit 15
FCKSM<1:0>
Bit 14
Bit 14
COE
Bit 13
COSC<1:0>
Bit 12
Bit 13
Reserved
Reserved
Bit 11
Bit 12
(2)
(2)
Bit 10
Bit 11
Bit 9
NOSC<1:0>
(1)
PWMPIN
Bit 10
Bit 8
(1)
EXTR
Bit 7
FOS<2:0>
POST<1:0>
HPOL
Bit 9
Reserved
SWR
Bit 6
Reserved
LPOL
Bit 8
(2)
SWDTEN
LOCK
Bit 5
(2)
BOREN
Bit 7
WDTO
Bit 4
Bit 6
SLEEP
Bit 3
CF
Bit 5
FWPSA<1:0>
Bit 2
IDLE
BORV<1:0>
TUN<3:0>
LPOSCEN OSWEN Depends on Configuration bits.
Bit 4
Bit 1
BOR
Bit 3
Bit 0
POR
Reserved
FPR<4:0>
Depends on type of Reset.
Bit 2
FWPSB<3:0>
Reserved
Reserved
(3)
Reset State
(2)
(2)
Bit 1
GCP
FPWRT<1:0>
ICS<1:0>
GWRP
Bit 0

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