DSPIC33FJ16GS504-I/PT Microchip Technology, DSPIC33FJ16GS504-I/PT Datasheet - Page 32

IC DSPIC MCU/DSP 16K 44-TQFP

DSPIC33FJ16GS504-I/PT

Manufacturer Part Number
DSPIC33FJ16GS504-I/PT
Description
IC DSPIC MCU/DSP 16K 44-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS504-I/PT

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ16GS504-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
DSPIC33FJ16GS504-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ16GS504-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
3.3
The dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/
X04 features a 17-bit by 17-bit single-cycle multiplier that
is shared by both the MCU ALU and DSP engine. The
multiplier can perform signed, unsigned and mixed sign
multiplication. Using a 17-bit by 17-bit multiplier for 16-bit
by 16-bit multiplication not only allows you to perform
mixed sign multiplication, it also achieves accurate
results for special operations, such as (-1.0) x (-1.0).
FIGURE 3-1:
DS70318D-page 30
Control Block
Data Access
PSV & Table
Program Memory
Special MCU Features
Address Latch
Data Latch
23
23
Controller
Interrupt
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 CPU CORE
BLOCK DIAGRAM
23
to Various Blocks
Control Signals
Control
Instruction
Stack
Logic
PCU
Decode &
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
Preliminary
Divide Support
DSP Engine
16
Y Data Bus
X Data Bus
Instruction Reg
Data Latch
ROM Latch
Address Generator Units
Address
X RAM
Latch
The dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/
X04 supports 16/16 and 32/16 divide operations, both
fractional and integer. All divide instructions are iterative
operations. They must be executed within a REPEAT
loop, resulting in a total execution time of 19 instruction
cycles. The divide operation can be interrupted during
any of those 19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
16
16
Data Latch
W Register Array
Address
Y RAM
Latch
EA MUX
16 x 16
16
16
16
16-Bit ALU
16
16
© 2009 Microchip Technology Inc.
16
16
To Peripheral Modules
16

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