PIC24HJ64GP502-I/MM Microchip Technology, PIC24HJ64GP502-I/MM Datasheet - Page 17

IC PIC MCU FLASH 64K 28-QFN

PIC24HJ64GP502-I/MM

Manufacturer Part Number
PIC24HJ64GP502-I/MM
Description
IC PIC MCU FLASH 64K 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP502-I/MM

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel / 12 bit, 10 Channel
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 3-5:
TABLE 3-6:
© 2010 Microchip Technology Inc.
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A
0xF8000C FPOR
0xF8000E
0xF80010
0xF80012
0xF80014
0xF80016
Legend: — = unimplemented bit, read as ‘0’.
Note 1:
0xF80000 FBS
0xF80002 Reserved
0xF80004 FGS
0xF80006 FOSCSEL
0xF80008 FOSC
0xF8000A FWDT
0xF8000C FPOR
0xF8000E FICD
0xF80010 FUID0
0xF80012 FUID1
0xF80014 FUID2
0xF80016 FUID3
Legend: — = unimplemented bit, read as ‘0’.
Note 1:
Address
Address
2:
3:
2:
These bits are reserved (read as ‘1’) and must be programmed as ‘1’.
These bits are reserved and always read as ‘1’.
The JTAGEN bit is set to ‘1’ by factory default. Microchip programmers such as MPLAB ICD 2 and REAL
ICE in-circuit emulator clear this bit by default when connecting to a device.
These reserved bits read as ‘1’ and must be programmed as ‘1’.
The JTAGEN bit is set to ‘1’ by factory default. Microchip programmers such as MPLAB ICD 2 and REAL
ICE in-circuit emulator clear this bit by default when connecting to a device.
FBS
Reserved
FGS
FOSCSEL
FOSC
FWDT
FICD
FUID0
FUID1
FUID2
FUID3
Name
Name
dsPIC33FJ12MC201/202 DEVICE CONFIGURATION REGISTER MAP
dsPIC33FJ32GP202/204 AND dsPIC33FJ16GP304, AND PIC24HJ32GP202/204 AND
PIC24HJ16GP304 DEVICE CONFIGURATION REGISTER MAP
FWDTEN WINDIS
PWMPIN
FWDTEN
IESO
Bit 7
FCKSM<1:0>
IESO
Reserved
Bit 7
FCKSM<1:0>
Reserved
Reserved
HPOL
Bit 6
(1)
WINDIS
(1)
Bit 6
(2)
JTAGEN
IOL1WAY
JTAGEN
LPOL
IOL1WAY
Bit 5
Bit 5
(2)
(3)
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
WDTPRE
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
ALTI2C
WDTPRE
Bit 4
ALTI2C
Reserved
Bit 4
(1)
Bit 3
Bit 3
BSS<2:0>
OSCIOFNC
WDTPOST<3:0>
BSS<2:0>
OSCIOFNC POSCMD<1:0>
WDTPOST<3:0>
Bit 2
Bit 2
GSS<1:0>
GSS<1:0>
FNOSC<2:0>
FPWRT<2:0>
FNOSC<2:0>
FPWRT<2:0>
DS70152H-page 17
POSCMD<1:0>
Bit 1
Bit 1
ICS<1:0>
ICS<1:0>
BWRP
GWRP
GWRP
BWRP
Bit 0
Bit 0

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