PIC24HJ64GP506A-I/PT Microchip Technology, PIC24HJ64GP506A-I/PT Datasheet - Page 60

IC PIC MCU FLASH 64KB 64-TQFP

PIC24HJ64GP506A-I/PT

Manufacturer Part Number
PIC24HJ64GP506A-I/PT
Description
IC PIC MCU FLASH 64KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP506A-I/PT

Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
9
Interface
CAN, I2C, SPI, UART
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8192 B
Interface Type
SPI, I2C, UART
Maximum Clock Frequency
7.37 MHz
Number Of Timers
13
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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TABLE 8-1:
DS70152H-page 60
Standard Operating Conditions
Operating Temperature: –40ºC-85ºC. Programming at 25ºC is recommended.
Param
P9b
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
No.
Note 1: V
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
2: Time depends on the FRC accuracy and the value of the FRC Oscillator tuning register. Refer to
DLY
DLY
DLY
DLY
DLY
R
VALID
DLY
HLD
KEY
KEY
DLY
MCLRH
±0.3V of V
“Electrical Characteristics” section in the specific device data sheet.
5
6
7
8
9
10 Delay between Last PGCx ↓ and MCLR ↓
3
1
2
11 Maximum Wait Time for Configuration
DD
must also be supplied to the AV
Delay between PGDx ↓ by Programming
Executive to PGDx Released by
Programming Executive
PGCx Low Time After Programming
Bulk Erase Time
Page Erase Time
Row Programming Time
MCLR Rise Time to Enter ICSP mode
Data Out Valid from PGCx ↑
MCLR ↓ to V
Delay from First MCLR ↓ to First PGCx ↑
for Key Sequence on PGDx
Delay from Last PGCx ↓ for Key Sequence
on PGDx to Second MCLR ↑
Register Programming
MCLR High Time
AC/DC CHARACTERISTICS AND TIMING REQUIREMENTS (CONTINUED)
DD
and V
DD
Characteristic
SS
, respectively.
DD
pins during programming. AV
19.5
1.28
Min
400
330
15
10
25
0
1
Max
100
500
1.0
23
25
DD
Units
and AV
ms
ms
ms
ms
μs
ns
μs
ns
ns
μs
ns
μs
s
© 2010 Microchip Technology Inc.
SS
should always be within
Conditions
See Note 2
See Note 2
See Note 2

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