DSPIC33FJ64GP804-I/PT Microchip Technology, DSPIC33FJ64GP804-I/PT Datasheet - Page 3

• Manufacturer Part Number: DSPIC33FJ64GP804-I/PT
• Description: IC DSPIC MCU/DSP 64K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP804-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Comparator
Audio DAC
Operations
Regulator
Module
Internal
Voltage
UART
ECAN
ECAN
UART
RTCC
JTAG
CPU
ADC
PSV
SPI
All
Only those issues indicated in the last column apply to the current silicon revision.
Specifications
Consumption
During Reset
Sleep Mode
Sleep Mode
SILICON ISSUE SUMMARY (CONTINUED)
Generation
Output Pin
Instruction
Operation
Operation
Character
Operation
Operation
Boundary
IR Mode
Transmit
Feature
Receive
in Sleep
Voltage
Current
150ºC
Break
Mode
EXCH
Scan
—
Number
Item
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
25.
23.
24.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When CMCON<CxOUTEN> bit is set, the Comparator
output pin cannot be used as a general purpose I/O pin
even if the Comparator is disabled.
When the VREGS bit (RCON<8>) is set to a logic ‘0’ the
device may reset and higher Sleep current may be
observed.
An address error trap occurs in certain addressing modes
when accessing the first four bytes of any PSV page.
The WAKIF bit in the CxINTF register cannot be cleared
by software instruction after the device is interrupted from
Sleep due to activity on the CAN bus.
The ECAN module may not store the received data in the
correct location.
The EXCH instruction does not execute correctly.
Writing to the SPIxBUF register as soon as TBF bit is
cleared will cause SPI module to ignore the written data.
The UART module will not generate back-to-back Break
characters.
The Audio DAC positive and negative output differential
voltages may not meet the specifications listed in the data
sheet.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
On 28-pin devices, Boundary Scan does not function
correctly for pin 7.
The RTCC module gets reset on any device Reset,
instead of getting reset only on a POR or BOR.
These revisions of silicon only support 140ºC operation
instead of 150ºC for Hi-Temp operating temperature.
Issue Summary
®
encoder/decoder
PD
) of the
A1 A2 A3 A4
DS80443F-page 3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X