PIC24HJ64GP504-I/ML Microchip Technology, PIC24HJ64GP504-I/ML Datasheet - Page 82

• Manufacturer Part Number: PIC24HJ64GP504-I/ML
• Description: IC PIC MCU FLASH 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP504-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel / 12 bit, 13 Channel
• Controller Family/series: PIC24
• No. Of I/o's: 35
• Ram Memory Size: 4KB
• Cpu Speed: 40MIPS
• No. Of Timers: 7
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Height: 0.88 mm
• Length: 8 mm
• Supply Voltage (max): 3.6 V, 3.9 V
• Supply Voltage (min): 2.7 V, 3 V
• Width: 8 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision H (October 2010)
This revision includes the following updates:
• Text and formatting updates have been
• All references to V
• All occurrences of PGC and PGD have been
• Added topics covered in
• Moved the Checksum Computation table to the
• Updated all occurrences of TBLPG to TBLPAG
• Removed the ERASEB command from the
• Updated the High-Level Enhanced ICSP™
• Replaced the Device Configuration Register Map
• Updated the Note in
• Changed Opcode 0x7 to Reserved in the
• Removed 4.2.10 “ERASEB Command”
• Updated the table cross-references in
• Combined all Default Configuration Register
• Relocated the paragraph on ICSP programming
• Added a Note to
• Updated Step 4 in Programming the Programming
• Updated Device IDs and Revision IDs (see
• Updated parameters D111, P1, P1A and P1B in
• Added Checksum Computation Example When
DS70152H-page 82
incorporated throughout the document
changed to: V
changed to PGCx and PGDx, respectively
Overview”
appendix (see
throughout the document
Command Set Summary (see
Programming Flow (see
(previously Table 4-3) with individual tables for
each dsPIC33F/PIC24H device family (see
Table 3-3
“Programming Methodology”
Programming Executive Command Set (see
Table
Section 5.7 “Writing Configuration Memory”
Values tables into one table (see
details, which now appears just before
Executive (see
Table
the AC/DC Characteristics and Timing
Requirements (see
Using CodeGuard™ Security (see
4-1)
7-1)
through
CAP
Table
Table
Section 6.1 “Overview”
Table
CAP
Table
Section 3.6.2
D-1)
6-1)
/V
DDCORE
3-12)
Figure
Section 1.0 “Device
8-1)
Table
3-1)
have been
Table
Table
3-1)
Table 5-7
5-6)
D-2).
© 2010 Microchip Technology Inc.