DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 149

• Manufacturer Part Number: DSPIC33FJ128GP206A-I/MR
• Description: IC DSPIC MCU/DSP 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP206A-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Product: DSCs
• Processor Series: DSPIC33F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

For example, suppose a 10 MHz crystal is being used,
with “XT with PLL” being the selected oscillator mode.
If PLLPRE<4:0> = 0, then N1 = 2. This yields a VCO
input of 10/2 = 5 MHz, which is within the acceptable
range of 0.8-8 MHz. If PLLDIV<8:0> = 0x1E, then
M = 32. This yields a VCO output of 5 x 32 = 160 MHz,
which is within the 100-200 MHz range needed.
If PLLPOST<1:0> = 0, then N2 = 2. This provides a
Fosc of 160/2 = 80 MHz. The resultant device operating
speed is 80/2 = 40 MIPS.
FIGURE 9-2:
TABLE 9-1:
 2009 Microchip Technology Inc.
Fast RC Oscillator with Divide-by-N
(FRCDIVN)
Fast RC Oscillator with Divide-by-16
(FRCDIV16)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL
(HSPLL)
Primary Oscillator (XT) with PLL
(XTPLL)
Primary Oscillator (EC) with PLL
(ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
Source (Crystal, External Clock
or Internal RC)
2:
Oscillator Mode
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
Note 1: This frequency range must be satisfied at all times.
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
dsPIC33FJXXXGPX06A/X08A/X10A PLL BLOCK DIAGRAM
dsPIC33FJXXXGPX06A/X08A/X10A
PLLPRE
Divide by
2-33
N1
Oscillator Source
0.8-8.0 MHz
Secondary
Here
Primary
Primary
Primary
Primary
Primary
Primary
Internal
Internal
Internal
Internal
Internal
Preliminary
(1)
X
EQUATION 9-3:
POSCMD<1:0>
Divide by
PLLDIV
2-513
F
VCO
M
CY
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
=
100-200 MHz
F
-------------
Here
OSC
2
F
VCO
=
(1)
1
-- -
2


PLLPOST
XT WITH PLL MODE
EXAMPLE
Divide by
10000000 32
--------------------------------- -
2, 4, 8
FNOSC<2:0>
N2
2 2 
111
110
101
100
011
011
011
010
010
010
001
000

12.5-80 MHz
DS70593B-page 149


Here
=
40 MIPS
(1)
Note
1, 2
F
—
—
—
—
1
1
1
1
1
1
1
OSC