DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 177

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128GP206A-I/MR

Manufacturer Part Number
DSPIC33FJ128GP206A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP206A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
15.0
FIGURE 15-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1:
2: Some registers and associated bits
OUTPUT COMPARE
of
X10A families of devices. It is not
intended to be a comprehensive refer-
ence source. To complement the informa-
tion in this data sheet, refer to Section
13. “Output Compare” (DS70209) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
2: The OCFA pin controls OC1 through OC4. The OCFB pin controls OC5 through OC8.
the dsPIC33FJXXXGPX06A/X08A/
An ‘x’ in a signal, register or bit name denotes the number of the output compare channels.
OUTPUT COMPARE MODULE BLOCK DIAGRAM
16
TMR2
dsPIC33FJXXXGPX06A/X08A/X10A
OCxRS
Comparator
OCxR
0
TMR3
(1)
(1)
1
16
OCTSEL
Rollover Rollover
TMR2
Preliminary
0
TMR3
1
The output compare module can select either Timer2 or
Timer3 for its time base. The module compares the
value of the timer with the value of one or two Compare
registers depending on the operating mode selected.
The state of the output pin changes when the timer
value matches the Compare register value. The output
compare module generates either a single output
pulse, or a sequence of output pulses, by changing the
state of the output pin on the compare match events.
The output compare module can also generate inter-
rupts on compare match events.
The output compare module has multiple operating
modes:
• Active-Low One-Shot mode
• Active-High One-Shot mode
• Toggle mode
• Delayed One-Shot mode
• Continuous Pulse mode
• PWM mode without Fault Protection
• PWM mode with Fault Protection
Mode Select
OCM<2:0>
Output
Logic
3
Set Flag bit
OCxIF
(1)
R
S
Q
Output Enable
DS70593B-page 177
OCx
OCFA
or
OCFB
(1)
(2)

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