DSPIC30F4013-20I/PT Microchip Technology, DSPIC30F4013-20I/PT Datasheet - Page 135

• Manufacturer Part Number: DSPIC30F4013-20I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 30
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F401320IPT

Figure 19-2
conversion rates above 200 ksps. The dsPIC30F3014
is shown as an example.
FIGURE 19-2:
The configuration procedures below give the required
setup values for the conversion speeds above
100 ksps.
19.7.1
The following configuration items are required to
achieve a 200 ksps conversion rate.
• Comply with conditions provided in
• Connect external V
• Set SSRC<2.0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Write the SMPI<3.0> control bits in the ADCON2
 2010 Microchip Technology Inc.
the recommended circuit shown in Figure 19-2.
enable the auto-convert option.
control bit in the ADCON1 register.
register for the desired number of conversions
between interrupts.
C2
0.1 F
Note 1: Ensure adequate bypass capacitors are provided on each V
R2
10
V
DD
200 ksps CONFIGURATION
GUIDELINE
depicts the recommended circuit for the
V
DD
C1
0.01 F
REF
ADC VOLTAGE REFERENCE SCHEMATIC
+ and V
11
1
2
3
4
5
6
7
8
9
10
REF
V
V
V
SS
DD
DD
- pins following
Table
19-2.
V
dsPIC30F3014
DD
R1
10
• Configure the ADC clock period to be:
• Configure the sampling time to be 1 T
The following figure shows the timing diagram of the
ADC running at 200 ksps. The T
tion with the guidelines described above allows a con-
version speed of 200 ksps. See
example.
V
V
V
V
DD
by writing to the ADCS<5:0> control bits in the
ADCON3 register.
writing: SAMC<4:0> = 00001.
SS
SS
DD
DD
dsPIC30F3014/4013
pin.
33
32
31
30
29
28
27
26
25
24
23
(14 + 1) x 200,000
1
V
DD
See Note 1
C8
1 F
C5
1 F
V
AV
= 334 ns
DD
AD
DD
Example 19-1
C7
0.1 F
C4
0.1 F
selection in conjunc-
DS70138G-page 135
V
AV
DD
AD
DD
C6
0.01 F
C3
0.01 F
by
for code
V
AV
DD
DD