DSPIC30F4013-20I/PT Microchip Technology, DSPIC30F4013-20I/PT Datasheet - Page 150

IC DSPIC MCU/DSP 48K 44TQFP

DSPIC30F4013-20I/PT

Manufacturer Part Number
DSPIC30F4013-20I/PT
Description
IC DSPIC MCU/DSP 48K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4013-20I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Package
44TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
30
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
13-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401320IPT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4013-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F4013-20I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F3014/4013
REGISTER 20-3:
DS70138G-page 150
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15-14
bit 13-11
bit 10-8
bit 7-5
bit 4-0
R/P
U
U
FCKSM<1:0>
Unimplemented: Read as ‘0’
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Unimplemented: Read as ‘0’
FOS<2:0>: Oscillator Group Selection on POR bits
111 = PLL oscillator; PLL source selected by FPR<4:0> bits (see
011 = EXT: External Oscillator; OSC1/OSC2 pins; external oscillator configuration selected by
010 = LPRC: Internal Low-Power RC
001 = FRC: Internal Fast RC
000 = LPOSC: Low-Power Crystal Oscillator; SOSCI/SOSCO pins
Unimplemented: Read as ‘0’
FPR<4:0>: Oscillator Selection within Primary Group bits (see
R/P
U
U
FOSC: OSCILLATOR CONFIGURATION REGISTER
FPR<4:0> bits
W = Writable bit
‘1’ = Bit is set
U
U
U
R/P
U
U
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/P
U
U
FPR<4:0>
Table
R/P
R/P
U
Table
20-2)
 2010 Microchip Technology Inc.
20-2)
x = Bit is unknown
FOS<2:0>
R/P
R/P
U
R/P
R/P
U
bit 16
bit 8
bit 0

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