DSPIC33FJ128MC506A-I/PT Microchip Technology, DSPIC33FJ128MC506A-I/PT Datasheet - Page 211

IC DSPIC MCU/DSP 128K 64-TQFP

DSPIC33FJ128MC506A-I/PT

Manufacturer Part Number
DSPIC33FJ128MC506A-I/PT
Description
IC DSPIC MCU/DSP 128K 64-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC506A-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC506A-I/PT
Manufacturer:
MICROCHIP
Quantity:
817
Part Number:
DSPIC33FJ128MC506A-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
20.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the dsPIC33FJXXXMCX06A/X08A/X10A
device family. The UART is a full-duplex, asynchronous
system that can communicate with peripheral devices,
such as personal computers, LIN/J2602, RS-232 and
RS-485 interfaces. The module also supports a hard-
ware flow control option with the UxCTS and UxRTS
pins and also includes an IrDA
FIGURE 20-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1: Both UART1 and UART2 can trigger a DMA data transfer. If U1TX, U1RX, U2TX or U2RX is selected as
2: Some registers and associated bits
2: If DMA transfers are required, the UART TX/RX FIFO buffer must be set to a size of 1 byte/word (i.e.,
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
of the dsPIC33FJXXXMCX06A/X08A/
X10A family of devices. However, it is not
intended to be a comprehensive refer-
ence source. To complement the informa-
tion in this data sheet, refer to Section
17.
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
a DMA IRQ source, a DMA transfer occurs when the U1TXIF, U1RXIF, U2TXIF or U2RXIF bit gets set as
a result of a UART1 or UART2 transmission or reception.
UTXISEL<1:0> = 00 and URXISEL<1:0> = 00).
“UART”
UART SIMPLIFIED BLOCK DIAGRAM
dsPIC33FJXXXMCX06A/X08A/X10A
®
(DS70188)
encoder and decoder.
Hardware Flow Control
Baud Rate Generator
UART Transmitter
UART Receiver
IrDA
®
in
the
Preliminary
The primary features of the UART module are:
• Full-Duplex, 8-Bit or 9-Bit Data Transmission
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
• Fully Integrated Baud Rate Generator with 16-Bit
• Baud Rates Ranging from 10 Mbps to 38 bps at 40
• 4-Deep First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• A Separate Interrupt for all UART Error Conditions
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA
• 16x Baud Clock Output for IrDA
A simplified block diagram of the UART is shown in
Figure 20-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
through the UxTX and UxRX Pins
UxRTS Pins
Prescaler
MIPS
Buffer
(9th bit = 1)
®
Encoder and Decoder Logic
BCLK
UxRTS
UxCTS
UxRX
UxTX
®
DS70594B-page 211
Support

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