DSPIC33FJ128MC506A-I/MR Microchip Technology, DSPIC33FJ128MC506A-I/MR Datasheet - Page 184

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128MC506A-I/MR

Manufacturer Part Number
DSPIC33FJ128MC506A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC506A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 16-5:
DS70594B-page 184
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
Note 1:
PEN4H
R/W-1
U-0
(1)
Reset condition of the PENxH and PENxL bits depends on the value of the PWMPIN Configuration bit in
the FPOR Configuration register.
Unimplemented: Read as ‘0’
PMOD<4:1>: PWM I/O Pair Mode bits
1 = PWM I/O pin pair is in the Independent PWM Output mode
0 = PWM I/O pin pair is in the Complementary Output mode
PEN4H:PEN1H: PWMxH I/O Enable bits
1 = PWMxH pin is enabled for PWM output
0 = PWMxH pin is disabled; I/O pin becomes general purpose I/O
PEN4L:PEN1L: PWMxL I/O Enable bits
1 = PWMxL pin is enabled for PWM output
0 = PWMxL pin is disabled; I/O pin becomes general purpose I/O
PEN3H
R/W-1
U-0
PWMxCON1: PWMx CONTROL REGISTER 1
(1)
W = Writable bit
‘1’ = Bit is set
PEN2H
R/W-1
U-0
(1)
PEN1H
R/W-1
U-0
Preliminary
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PEN4L
PMOD4
R/W-0
R/W-1
(1)
PEN3L
PMOD3
R/W-0
R/W-1
(1)
 2009 Microchip Technology Inc.
x = Bit is unknown
PEN2L
PMOD2
R/W-0
R/W-1
(1)
PEN1L
PMOD1
R/W-0
R/W-1
bit 8
bit 0
(1)

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