DSPIC33FJ128MC506A-I/MR Microchip Technology, DSPIC33FJ128MC506A-I/MR Datasheet - Page 188

• Manufacturer Part Number: DSPIC33FJ128MC506A-I/MR
• Description: IC DSPIC MCU/DSP 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC506A-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Product: DSCs
• Processor Series: DSPIC33F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 16-9:
DS70594B-page 188
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
FAOV4H
FLTAM
R/W-0
R/W-0
FAOVxH<4:1>:FAOVxL<4:1>: Fault Input A PWM Override Value bits
1 = The PWM output pin is driven active on an external Fault input event
0 = The PWM output pin is driven inactive on an external Fault input event
FLTAM: Fault A Mode bit
1 = The Fault A input pin functions in the Cycle-by-Cycle mode
0 = The Fault A input pin latches all control pins to the states programmed in FLTACON<15:8>
Unimplemented: Read as ‘0’
FAEN4: Fault Input A Enable bit
1 = PWM4H/PWM4L pin pair is controlled by Fault Input A
0 = PWM4H/PWM4L pin pair is not controlled by Fault Input A
FAEN3: Fault Input A Enable bit
1 = PWM3H/PWM3L pin pair is controlled by Fault Input A
0 = PWM3H/PWM3L pin pair is not controlled by Fault Input A
FAEN2: Fault Input A Enable bit
1 = PWM2H/PWM2L pin pair is controlled by Fault Input A
0 = PWM2H/PWM2L pin pair is not controlled by Fault Input A
FAEN1: Fault Input A Enable bit
1 = PWM1H/PWM1L pin pair is controlled by Fault Input A
0 = PWM1H/PWM1L pin pair is not controlled by Fault Input A
FAOV4L
R/W-0
U-0
—
PxFLTACON: PWMx FAULT A CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
FAOV3H
R/W-0
U-0
—
FAOV3L
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FAOV2H
FAEN4
R/W-0
R/W-0
FAOV2L
FAEN3
R/W-0
R/W-0
 2009 Microchip Technology Inc.
x = Bit is unknown
FAOV1H
FAEN2
R/W-0
R/W-0
FAOV1L
FAEN1
R/W-0
R/W-0
bit 8
bit 0