DSPIC33FJ128GP706A-I/MR Microchip Technology, DSPIC33FJ128GP706A-I/MR Datasheet - Page 100

• Manufacturer Part Number: DSPIC33FJ128GP706A-I/MR
• Description: IC DSPIC MCU/DSP 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP706A-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Product: DSCs
• Processor Series: DSPIC33F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 53
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP3909 / dsPIC33F 3-Phase Energy Meter Reference Design
DS51723A-page 100
Since the phase lag of a CT's output signal is related to the magnitude of current,
different correction coefficients, K, can be set according to different RMS current
values. In this design, 5 calibration points can be set. If it does not require high-preci-
sion, fewer points can be set to simplify calibration.
If one-time calibration cannot meet the precision requirement, more calibrations can be
done. The new angle error may still be calculated using Equation C-72. The new
correction coefficient is:
EQUATION C-74:
EQUATION C-75:
C.16.0.1 PHASE LAG COMPENSATION WHEN FREQUENCY VARIES
For the same current intensity, the signal delay caused by the CT is the same. When
the frequency of the input signal varies, the phase lag will be different. Normally,
calibration is done at 50 Hz. When the frequency varies, if the same phase lag
compensation coefficient for 50 Hz is still used, it will cause an error in the power
measurement. In most cases, the frequency varies in a small range (test specification
requires ±2.5%), so it has little effect on the measurement accuracy. For meters with
an accuracy of 0.5s or above, this measurement error can be ignored. But for 0.2s
meters, the error cannot be ignored and the frequency variation needs to be corrected
during calculation.
The phase lag compensation coefficient k
Assuming that the freqnency is 50 Hz, the signal delay caused by CT is t, then after
correction, the compensation coefficient k
EQUATION C-76:
EQUATION C-77:
When frequency varies, assuming that the frequency offset is Δf, i.e. the input signal
frequency is 50 + Δf, then the compensation coefficient will be:
EQUATION C-78:
EQUATION C-79:
k'
k'
1
2
=
=
cos
k'
sin
k'
1
2
(
(
k
=
k
=
Δϕ
Δϕ
1
2
cos
=
sin
=
1
1
+
+
cos
Δϕ
Δ
sin
Δϕ
Δϕ
ϕ
Δϕ
Δ
=
=
2
2
ϕ
)
)
cos
sin
=
=
=
=
1
1
and k
and k
k
(
k
cos
sin
(
2
t
1
t
⋅
⋅
⋅
⋅
(
(
(
(
cos
cos
t 50 2
50
t 50 2
50
⋅
2
2
⋅
+
Δϕ
Δϕ
are corrected during calculation.
will be:
+
Δ
⋅
⋅
Δ
2
2
f
f
–
) 2
–
π
) 2
π
⋅
)
⋅
k
k
)
1
2
π
π
⋅
⋅
© 2009 Microchip Technology Inc.
)
)
sin
sin
Δϕ
Δϕ
2
2