DSPIC33FJ128MC510-I/PT Microchip Technology, DSPIC33FJ128MC510-I/PT Datasheet - Page 21

IC DSPIC MCU/DSP 128K 100TQFP

DSPIC33FJ128MC510-I/PT

Manufacturer Part Number
DSPIC33FJ128MC510-I/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC510-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC510-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
6.0
System management services provided by the
dsPIC33F device family include:
• Control of clock options and oscillators
• Power-on Reset
• Oscillator Start-up Timer/Stabilizer
• Watchdog Timer with RC oscillator
• Fail-Safe Clock Monitor
• Reset by multiple sources
6.1
There are 7 clock options provided by the dsPIC33F:
• FRC Oscillator
• FRC Oscillator with PLL
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator
• LPRC Oscillator
The FRC (Fast RC) internal oscillator runs at a nominal
frequency of 7.37 MHz. The user software can tune the
FRC frequency. User software can specify a factor by
which this clock frequency is scaled.
The primary oscillator can use one of the following as
its clock source:
1.
2.
3.
The secondary (LP) oscillator is designed for low power
and uses a 32 kHz crystal or ceramic resonator. The LP
oscillator uses the SOSCI and SOSCO pins.
The LPRC (Low-Power RC) internal oscIllator runs at a
nominal frequency of 32.768 kHz. Another scaled
reference clock is used by the Watchdog Timer (WDT)
and Fail-Safe Clock Monitor (FSCM).
© 2005 Microchip Technology Inc.
XT (Crystal): Crystals and ceramic resonators in
the range of 3 MHz to 10 MHz. The crystal is
connected to the OSC1 and OSC2 pins.
HS (High-Speed Crystal): Crystals in the range
of 10 MHz to 40 MHz. The crystal is connected
to the OSC1 and OSC2 pins.
EC (External Clock): External clock signal in the
range of 0.8 MHz to 64 MHz. The external clock
signal is directly applied to the OSC1 pin.
SYSTEM INTEGRATION
Clock Options and Oscillators
Preliminary
The clock signals generated by the FRC and primary
oscillators can be optionally applied to an on-chip
Phase Locked Loop (PLL) to provide a wide range of
output frequencies for device operation. The input to
the PLL can be in the range of 1.6 MHz to 16 MHz, and
the PLL Phase Detector Input Divider, PLL Multiplier
Ratio and PLL Voltage Controlled Oscillator (VCO) can
be individually configured by user software to generate
output frequencies in the range of 25 MHz to 160 MHz.
The output of the oscillator (or the output of the PLL if
a PLL mode has been selected) is divided by 4 to
generate the device instruction clock (F
defines the operating speed of the device, and speeds
up to 40 MHz are supported by the dsPIC33F
architecture.
The dsPIC33F oscillator system provides:
• Various external and internal oscillator options as
• An on-chip PLL to scale the internal operating
• The internal FRC oscillator can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile configuration bits for main oscillator
A simplified block diagram of the oscillator system is
shown in Figure 6-1.
clock sources
frequency to the required system clock frequency
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
clock failure and takes fail-safe measures
selection.
dsPIC33F
DS70155C-page 19
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