ATMEGA1284P-PU Atmel, ATMEGA1284P-PU Datasheet - Page 225

• Manufacturer Part Number: ATMEGA1284P-PU
• Description: MCU AVR 128K ISP FLASH 40-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1284P-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.7.3
8272A–AVR–01/10
Slave Receiver Mode
Figure 20-14. Formats and States in the Master Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a Master Transmitter
(see
are zero or are masked to zero.
Figure 20-15. Data transfer in Slave Receiver mode
To initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:
164A/164PA/324A/324PA/644A/644PA/1284/1284P
TWAR
value
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Figure
20-15). All the status codes mentioned in this section assume that the prescaler bits
SDA
SCL
From master to slave
From slave to master
$08
S
TWA6
SLA
Device 1
RECEIVER
SLAVE
R
TWA5
MR
TRANSMITTER
A or A
Device 2
DATA
$40
$48
$38
$68
MASTER
A
A
A
$78
TWA4
Other master
Other master
n
continues
continues
Device’s Own Slave Address
P
$B0
DATA
Device 3
A
TWA3
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero
........
$50
$38
To corresponding
states in slave mode
A
A
TWA2
Device n
Other master
DATA
continues
V
CC
$58
A
TWA1
R1
$10
R
P
S
R2
TWA0
SLA
W
R
TWGCE
MT
225