DSPIC33FJ128GP708-I/PT Microchip Technology, DSPIC33FJ128GP708-I/PT Datasheet - Page 315

• Manufacturer Part Number: DSPIC33FJ128GP708-I/PT
• Description: IC DSPIC MCU/DSP 128K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP708-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 69
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

INDEX
A
A/D Converter ................................................................... 225
AC Characteristics ............................................................ 266
ADC Module
Alternate Interrupt Vector Table (AIVT) .............................. 81
Arithmetic Logic Unit (ALU)................................................. 27
Assembler
B
Barrel Shifter ....................................................................... 31
Bit-Reversed Addressing .................................................... 64
Block Diagrams
C
C Compilers
Clock Switching................................................................. 145
Code Examples
Code Protection ........................................................ 237, 243
Configuration Bits.............................................................. 237
Configuration Register Map .............................................. 237
Configuring Analog Port Pins ............................................ 156
CPU
© 2009 Microchip Technology Inc.
DMA .......................................................................... 225
Initialization ............................................................... 225
Key Features............................................................. 225
Internal RC Accuracy ................................................ 268
Load Conditions ........................................................ 266
ADC11 Register Map .................................................. 49
ADC2 Register Map .................................................... 49
MPASM Assembler................................................... 254
Example ...................................................................... 65
Implementation ........................................................... 64
Sequence Table (16-Entry)......................................... 65
16-bit Timer1 Module ................................................ 157
A/D Module ............................................................... 226
Connections for On-Chip Voltage Regulator............. 241
DCI Module ............................................................... 218
Device Clock ..................................................... 137, 139
DSP Engine ................................................................ 28
dsPIC33F .................................................................... 14
dsPIC33F CPU Core................................................... 22
ECAN Module ........................................................... 192
Input Capture ............................................................ 165
Output Compare ....................................................... 167
PLL............................................................................ 139
Reset System.............................................................. 77
Shared Port Structure ............................................... 155
SPI ............................................................................ 171
Timer2 (16-bit) .......................................................... 161
Timer2/3 (32-bit) ....................................................... 160
UART ........................................................................ 185
Watchdog Timer (WDT) ............................................ 242
MPLAB C18 .............................................................. 254
MPLAB C30 .............................................................. 254
Enabling .................................................................... 145
Sequence.................................................................. 145
Erasing a Program Memory Page............................... 75
Initiating a Programming Sequence............................ 76
Loading Write Buffers ................................................. 76
Port Write/Read ........................................................ 156
PWRSAV Instruction Syntax..................................... 147
Description (Table).................................................... 238
Control Register .......................................................... 24
dsPIC33FJXXXGPX06/X08/X10
CPU Clocking System ...................................................... 138
Customer Change Notification Service............................. 317
Customer Notification Service .......................................... 317
Customer Support............................................................. 317
D
Data Accumulators and Adder/Subtractor .......................... 29
Data Address Space........................................................... 35
Data Converter Interface (DCI) Module ............................ 217
DC Characteristics............................................................ 258
DCI
DCI I/O Pins...................................................................... 217
DCI Module
Development Support ....................................................... 253
DMA Module
DMAC Registers ............................................................... 128
DSP Engine ........................................................................ 27
E
ECAN Module
Options ..................................................................... 138
Selection................................................................... 138
Data Space Write Saturation ...................................... 31
Overflow and Saturation ............................................. 29
Round Logic ............................................................... 30
Write Back .................................................................. 30
Alignment.................................................................... 35
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
Near Data Space ........................................................ 35
Software Stack ........................................................... 61
Width .......................................................................... 35
I/O Pin Input Specifications ...................................... 263
I/O Pin Output Specifications.................................... 264
Idle Current (I
Operating Current (I
Power-Down Current (I
Program Memory...................................................... 265
Temperature and Voltage Specifications.................. 259
Buffer Control ........................................................... 217
Buffer Data Alignment .............................................. 217
Introduction............................................................... 217
Transmit/Receive Shift Register ............................... 217
COFS........................................................................ 217
CSCK........................................................................ 217
CSDI ......................................................................... 217
CSDO ....................................................................... 217
Register Map .............................................................. 58
DMA Register Map ..................................................... 50
DMAxCNT ................................................................ 128
DMAxCON................................................................ 128
DMAxPAD ................................................................ 128
DMAxREQ ................................................................ 128
DMAxSTA................................................................. 128
DMAxSTB................................................................. 128
Multiplier ..................................................................... 29
CiFMSKSEL2 register .............................................. 209
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1)......... 52
ECAN1 Register Map (C1CTRL1.WIN = 0)................ 52
ECAN1 Register Map (C1CTRL1.WIN = 1)................ 53
es with 16 KB RAM............................................. 37
es with 30 KB RAM............................................. 38
es with 8 KB RAM............................................... 36
IDLE
) .................................................... 261
DD
) ............................................ 260
PD
)........................................ 262
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