AT89C51ED2-RDTUM Atmel, AT89C51ED2-RDTUM Datasheet - Page 103

• Manufacturer Part Number: AT89C51ED2-RDTUM
• Description: IC 8051 MCU FLASH 64K 64VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51ED2-RDTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: AT89
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 50
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

24.8
24.8.1
24.8.2
4235K–8051–05/08
Functional Description
Software Security Bits (SSB)
Full Chip Erase
The SSB protects any Flash access from ISP command.
The command "Program Software Security Bit" can only write a higher priority level.
There are three levels of security:
This is the default level.
From level 0, one can write level 1 or level 2.
For this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns ’P’ on write access.
From level 1, one can write only level 2.
The level 2 forbids all read and write accesses to/from the Flash/EEPROM memory.
The Bootloader returns ’L’ on read or write access.
Only a full chip erase in parallel mode (using a programmer) or ISP command can reset the soft-
ware security bits.
From level 2, one cannot read and write anything.
Table 24-7.
The ISP command "Full Chip Erase" erases all user Flash memory (fills with FFh) and sets
some bytes used by the bootloader at their default values:
• level 0: NO_SECURITY (FFh)
• level 1: WRITE_SECURITY (FEh)
• level 2: RD_WR_SECURITY (FCh
Manufacturer Info
• BSB = FFh
Flash/EEPROM
Full Chip Erase
Bootloader Info
Blank Check
BSB & SBV
Erase Block
Fuse Bit
SSB
Software Security Byte Behavior
Read-only access allowed
Read-only access allowed
Any access allowed
Any access allowed
Any access allowed
Any access allowed
Allowed
Allowed
Allowed
Level 0
Read-only access allowed
Read-only access allowed
Read-only access allowed
Read-only access allowed
Read-only access allowed
Write level 2 allowed
Not allowed
Allowed
Allowed
Level 1
AT89C51RD2/ED2
Read-only access allowed
Read-only access allowed
Read-only access allowed
Any access not allowed
Any access not allowed
Any access not allowed
Not allowed
Allowed
Allowed
Level 2
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