DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet - Page 28

• Manufacturer Part Number: DSPIC30F6012A-30I/PT
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 52
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012A30IP

8.5.7
The ERASEB command performs a Bulk Erase. The MS
field selects the memory to be bulk erased, with options
for erasing Code and/or Data EEPROM in individual
memory segments.
When Full Chip Erase is selected, the following
memory regions are erased:
• All code memory (even if code-protected)
• All data EEPROM
• All code-protect Configuration registers
Only the executive code memory, Unit ID, device ID
and Configuration registers that are not code-protected
remain intact after a Chip Erase.
Expected Response (2 words):
0x1700
0x0002
DS70102K-page 28
15
Opcode
Length
Reserved 0x0
MS
Opcode
Note:
Field
12 11
ERASEB COMMAND
A Full Chip Erase cannot be performed in
low-voltage programming systems (V
less than 4.5 volts). ERASED and ERASEP
must be used to erase code memory,
executive memory and data memory.
Alternatively, individual Segment Erase
operations may be performed.
0x7
0x2
Select memory to erase:
Segment
General Segment, interrupt vectors and
FGS Configuration register
Boot, Secure and General Segments,
and FBS, FSS and FGS Configuration
registers
Secure and General Segments, and
FSS and FGS Configuration registers
Segment
Segment
0x0 = All Code in General Segment
0x1 = All Data EEPROM in General
0x2 = All Code and Data EEPROM in
0x3 = Full Chip Erase
0x4 = All Code and Data EEPROM in
0x5 = All Code and Data EEPROM in
0x6 = All Data EEPROM in Boot
0x7 = All Data EEPROM in Secure
Reserved
Description
Length
2
MS
DD
0
8.5.8
The ERASED command erases the specified number of
rows of data EEPROM from the specified base
address. The specified base address must be a
multiple of 0x20. Since the data EEPROM is mapped
to program space, a 24-bit base address must be
specified.
After the erase is performed, all targeted bytes of data
EEPROM will contain 0xFF.
Expected Response (2 words):
0x1800
0x0002
15
Opcode
Length
Num_Rows Number of rows to erase (max of 128)
Addr_MSB
Addr_LS
Note:
Opcode
Field
Num_Rows
12 11
ERASED COMMAND
The ERASED command cannot be used to
erase the Configuration registers or
device ID. Code-protect Configuration
registers can only be erased with the
ERASEB command, while the device ID is
read-only.
0x8
0x3
MSB of 24-bit base address
LS 16 bits of 24-bit base address
Addr_LS
© 2010 Microchip Technology Inc.
8 7
Description
Length
Addr_MSB
0