AT32UC3A0128-ALUT Atmel, AT32UC3A0128-ALUT Datasheet - Page 503

• Manufacturer Part Number: AT32UC3A0128-ALUT
• Description: IC MCU AVR32 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

30.7
30.7.1
30.7.1.1
30.7.1.2
Figure 30-5. General States
32058J–AVR32–04/11
Functional Description
USB General Operation
Introduction
Power-On and Reset
After a hardware reset, the USB controller is disabled. When enabled, the USB controller runs
either in device mode or in host mode according to the ID detection.
If the USB_ID pin is not connected to ground, the ID bit is set by hardware (the internal pull-up
resistor of the USB_ID pin must be enabled by the GPIO controller) and device mode is
engaged.
The ID bit is cleared by hardware when a low level has been detected on the USB_ID pin. Host
mode is then engaged.
Figure 30-5
After a hardware reset, the USB controller is in the Reset state. In this state:
After setting USBE, the USB controller enters the Device or the Host mode (according to the ID
detection) in idle state.
The USB controller can be disabled at any time by clearing USBE. In fact, clearing USBE acts
as a hardware reset, except that the OTGPADE, VBUSPO, FRZCLK, UIDE, UIMOD and LS bits
are not reset.
•the macro is disabled (USBE = 0);
•the macro clock is stopped in order to minimize power consumption (FRZCLK = 1);
•the pad is in suspend mode;
•the internal states and registers of the device and host modes are reset;
•the DPRAM is not cleared and is accessible;
•the ID and VBUS read-only bits reflect the states of the USB_ID and VBUS input pins;
•the OTGPADE, VBUSPO, FRZCLK, USBE, UIDE, UIMOD and LS bits can be written by
software, so that the user can program pads and speed before enabling the macro, but their
value is only taken into account once the macro is enabled and unfrozen.
describes the USB controller main states.
Clock stopped:
FRZCLK = 1
Device
Macro off:
USBE = 0
USBE = 1
ID = 1
USBE = 0
Reset
USBE = 1
ID = 0
USBE = 0
USBE = 0
Host
RESET
HW
state>
<any
other
AT32UC3A
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