AT32UC3A0256-ALUT Atmel, AT32UC3A0256-ALUT Datasheet - Page 462

• Manufacturer Part Number: AT32UC3A0256-ALUT
• Description: IC MCU AVR32 256KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0256-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 144LQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

29.7.5
Register Name:
Access Type:
This register points to the entry in the receive buffer queue (descriptor list) currently being used. It is written with the start
location of the receive buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original
values after either 1024 buffers or when the wrap bit of the entry is set.
Reading this register returns the location of the descriptor currently being accessed. This value increments as buffers are
used. Software should not use this register for determining where to remove received frames from the queue as it con-
stantly changes as new frames are received. Software should instead work its way through the buffer descriptor queue
checking the used bits.
Receive buffer writes also comprise bursts of two words and, as with transmit buffer reads, it is recommended that bit 2 is
always written with zero to prevent a burst crossing a 1K boundary, in violation of the System Bus specification.
• ADDR:
Written with the address of the start of the receive queue, reads as a pointer to the current buffer being used.
32058J–AVR32–04/11
31
23
15
7
Receive buffer queue pointer address
Receive Buffer Queue Pointer Register
30
22
14
RBQP
6
Read/Write
29
21
13
5
ADDR
28
20
12
4
ADDR
ADDR
ADDR
27
19
11
3
26
18
10
2
25
17
9
1
–
AT32UC3A
24
16
8
0
–
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