LPC2102FBD48,151 NXP Semiconductors, LPC2102FBD48,151 Datasheet - Page 22

• Manufacturer Part Number: LPC2102FBD48,151
• Description: IC ARM7 MCU FLASH 16K 48-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2102FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 70MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 4 KB
• Interface Type: I2C/JTAG/SPI/SSP/UART
• Maximum Clock Frequency: 70 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: LPC2000
• Device Core: ARM7TDMI-S
• Device Core Size: 16/32Bit
• Frequency (max): 70MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC2000
• Maximum Speed: 70 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2103UME - BOARD EVAL MCB2103 + ULINK-MEMCB2103U - BOARD EVAL MCB2103 + ULINK2MCB2103 - BOARD EVAL NXP LPC2101/2101/2103622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-2093; 935280965151; LPC2102FBD48-S

NXP Semiconductors
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Per ground pin.
[11] Dependent on package type.
[12] Performed per AEC-Q100-002.
[13] Performed per AEC-Q100-003.
[14] Performed per AEC-Q100-011.
LPC2101_02_03_4
Product data sheet
Symbol
V
V
V
V
V
V
I
I
T
P
V
DD
SS
stg
DD(1V8)
DD(3V3)
DDA
i(VBAT)
IA
I
tot(pack)
ESD
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
Core and internal rail.
External rail.
On ADC related pins.
Including voltage on outputs in 3-state mode.
Only valid when the V
Not to exceed 4.6 V.
Per supply pin.
The peak current is limited to 25 times the corresponding maximum current.
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
otherwise noted.
Limiting values
Parameter
supply voltage (1.8 V)
supply voltage (3.3 V)
analog 3.3 V pad supply voltage
input voltage on pin VBAT
analog input voltage
input voltage
supply current
ground current
storage temperature
total power dissipation (per package)
electrostatic discharge voltage
DD(3V3)
supply voltage is present.
Rev. 04 — 2 June 2009
Conditions
for the RTC
5 V tolerant I/O
pins
other I/O pins
based on package
heat transfer, not
device power
consumption
Human Body
Model (HBM)
Machine Model
(MM)
Charged Device
Model (CDM)
[1]
Single-chip 16-bit/32-bit microcontrollers
[5][6]
[10]
[11]
[2]
[3]
[4]
[5]
[8]
Min
-
-
-
0.5
0.5
0.5
0.5
0.5
0.5
0.5
65
4000
200
800
LPC2101/02/03
Max
+2.5
+4.6
+4.6
+4.6
+5.1
+6.0
V
100
100
+150
1.5
+4000
+200
+800
DD
[9]
[9]
+ 0.5
© NXP B.V. 2009. All rights reserved.
[7]
SS
Unit
V
V
V
V
V
V
V
mA
mA
W
V
V
V
C
unless
[12]
[13]
[14]
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