LPC2141FBD64,151 NXP Semiconductors, LPC2141FBD64,151 Datasheet - Page 17

• Manufacturer Part Number: LPC2141FBD64,151
• Description: IC ARM7 MCU FLASH 32K 64LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2141FBD64,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 64-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 45
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/UART/SPI/SSP/I2C/USB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 45
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Cpu Family: LPC2000
• Device Core: ARM7TDMI-S
• Device Core Size: 16/32Bit
• Frequency (max): 60MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 45
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Package: 64LQFP
• Family Name: LPC2000
• Maximum Speed: 60 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2140UME - BOARD EVAL MCB2140 + ULINK-MEMCB2140U - BOARD EVAL MCB2140 + ULINK2MCB2140 - BOARD EVAL NXP LPC214X ARM FAM622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-2097 - BOARD EVAL FOR LPC214X ARM MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1761; 935280015151; LPC2141FBD64-S

NXP Semiconductors
LPC2141_42_44_46_48_4
Product data sheet
6.10.1 Features
6.10 USB 2.0 device controller
6.11 UARTs
The USB is a 4-wire serial bus that supports communication between a host and a
number (127 max) of peripherals. The host controller allocates the USB bandwidth to
attached devices through a token based protocol. The bus supports hot plugging,
unplugging, and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The LPC2141/42/44/46/48 is equipped with a USB device controller that enables
12 Mbit/s data exchange with a USB host controller. It consists of a register interface,
serial interface engine, endpoint buffer memory and DMA controller. The serial interface
engine decodes the USB data stream and writes data to the appropriate end point buffer
memory. The status of a completed USB transfer or error condition is indicated via status
registers. An interrupt is also generated if enabled.
A DMA controller (available in LPC2146/48 only) can transfer data between an endpoint
buffer and the USB RAM.
The LPC2141/42/44/46/48 each contain two UARTs. In addition to standard transmit and
receive data lines, the LPC2144/46/48 UART1 also provides a full modem control
handshake interface.
Compared to previous LPC2000 microcontrollers, UARTs in LPC2141/42/44/46/48
introduce a fractional baud rate generator for both UARTs, enabling these microcontrollers
to achieve standard baud rates such as 115200 with any crystal frequency above 2 MHz.
In addition, auto-CTS/RTS flow-control functions are fully implemented in hardware
(UART1 in LPC2144/46/48 only).
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Selectable speed versus power.
Fully compliant with USB 2.0 Full-speed specification.
Supports 32 physical (16 logical) endpoints.
Supports control, bulk, interrupt and isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint maximum packet size selection (up to USB maximum specification) by
software at run time.
RAM message buffer size based on endpoint realization and maximum packet size.
Supports SoftConnect and GoodLink LED indicator. These two functions are sharing
one pin.
Supports bus-powered capability with low suspend current.
Supports DMA transfer on all non-control endpoints (LPC2146/48 only).
One duplex DMA channel serves all endpoints (LPC2146/48 only).
Allows dynamic switching between CPU controlled and DMA modes (only in
LPC2146/48).
Double buffer implementation for bulk and isochronous endpoints.
Rev. 04 — 17 November 2008
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
© NXP B.V. 2008. All rights reserved.
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