LPC1756FBD80,551 NXP Semiconductors, LPC1756FBD80,551 Datasheet - Page 5

• Manufacturer Part Number: LPC1756FBD80,551
• Description: IC ARM CORTEX MCU 256K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1756FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 100 MHz
• Cpu Family: LPC17xx
• Device Core Size: 32b
• Frequency (max): 100MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 52
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.4/2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4791; 935288606551

NXP Semiconductors
5. Block diagram
LPC1759_58_56_54_52_51
Product data sheet
Fig 1.
RXD0/TXD0
MOSI/MISO
P0, P1,
PCAP1[1:0]
2 × MAT0/1
P2, P4
8 × UART1
PWM1[6:1]
SCK/SSEL
1 × CAP0,
2 × CAP1
AD0[7:2]
RTCX1
RTCX2
RD1/2
SSEL1
MISO1
MOSI1
P0, P2
VBAT
TD1/2
SCK1
SDA1
SCL1
Grey-shaded blocks represent peripherals with connection to the GPDMA.
Block diagram
debug
port
HIGH-SPEED
OSCILLATOR
GPIO INTERRUPT CONTROL
RTC POWER DOMAIN
GPIO
32 kHz
BACKUP REGISTERS
I-code
bus
APB slave group 0
PIN CONNECT
CORTEX-M3
CAN1/CAN2
interface
12-bit ADC
TEST/DEBUG
TIMER 0/1
UART0/1
INTERFACE
JTAG
PWM1
SSP1
WDT
ARM
I2C1
SPI0
D-code
bus
slave
(1)
RTC
system
bus
All information provided in this document is subject to legal disclaimers.
MULTILAYER AHB MATRIX
LPC1759/58/56/54/52/51
CONTROLLER
Rev. 6.01 — 11 March 2011
BRIDGE 0
DMA
AHB TO
APB
master
(1)
(2)
slave
LPC1759/58/56 only
LPC1758 only
CONTROLLER
WITH DMA
ETHERNET
RMII pins
BRIDGE 1
AHB TO
LPC1759/58/56/54/52/51
APB
master
(2)
slave
(3)
(4)
CONTROLLER
DEVICE/OTG
WITH DMA
USB HOST/
USB pins
USB PHY
LPC1759/58/56/54 only
LPC1752/51 USB device only
32-bit ARM Cortex-M3 microcontroller
slave
QUADRATURE ENCODER
EXTERNAL INTERRUPTS
MOTOR CONTROL PWM
master
SYSTEM CONTROL
(4)
slave
slave
APB slave group 1
512/256/128/64/32 kB
TIMER2/3
RI TIMER
UART2/3
DAC
ACCELERATOR
SSP0
I2S
I2C2
POWER CONTROL,
XTAL2
(1)
GENERATION,
(3)
FLASH
FLASH
FUNCTIONS
16/8 kB
SRAM
SYSTEM
64/32/
ROM
CLOCK
XTAL1
clocks and
controls
RESET
002aae153
© NXP B.V. 2011. All rights reserved.
MCOA[2:0]
MCOB[2:0]
MCI[2:0]
SCK0
SSEL0
MISO0
MOSI0
RXD2/3
TXD2/3
I2SRX_SDA
I2STX_CLK
I2STX_WS
I2STX_SDA
TX_MCLK
RX_MCLK
SCL2
SDA2
4 × MAT2
2 × MAT3
PHA, PHB
INDEX
AOUT
EINT0
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