LPC1766FBD100,551 NXP Semiconductors, LPC1766FBD100,551 Datasheet - Page 70

• Manufacturer Part Number: LPC1766FBD100,551
• Description: IC ARM CORTEX MCU 256K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1766FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Cpu Family: LPC17xx
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 100MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.4V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Package: 100LQFP
• Family Name: LPC1700
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4795; 935287917551

NXP Semiconductors
LPC1769_68_67_66_65_64_63
Product data sheet
14.4 Standard I/O pin configuration
order to keep the noise coupled in via the PCB as small as possible. Also parasitics
should stay as small as possible. Values of C
accordingly to the increase in parasitics of the PCB layout.
Figure 35
The default configuration for standard I/O pins is input with pull-up enabled. The weak
MOS devices provide a drive capability equivalent to pull-up and pull-down resistors.
Fig 35. Standard I/O pin configuration with analog input
•
•
•
•
•
as digital output
as analog input
as digital input
pin configured
pin configured
pin configured
Digital output driver: Open-drain mode enabled/disabled
Digital input: Pull-up enabled/disabled
Digital input: Pull-down enabled/disabled
Digital input: Repeater mode enabled/disabled
Analog input
driver
shows the possible pin modes for standard I/O pins with analog input function:
All information provided in this document is subject to legal disclaimers.
open-drain enable
repeater mode
output enable
analog input
Rev. 6.01 — 11 March 2011
data output
data input
enable
LPC1769/68/67/66/65/64/63
pull-down enable
pull-up enable
select analog input
x1
and C
32-bit ARM Cortex-M3 microcontroller
x2
should be chosen smaller
V
V
DD
DD
strong
pull-up
strong
pull-down
weak
pull-up
weak
pull-down
© NXP B.V. 2011. All rights reserved.
V
ESD
DD
ESD
V
SS
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