LPC1766FBD100,551 NXP Semiconductors, LPC1766FBD100,551 Datasheet - Page 78

• Manufacturer Part Number: LPC1766FBD100,551
• Description: IC ARM CORTEX MCU 256K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1766FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Cpu Family: LPC17xx
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 100MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.4V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Package: 100LQFP
• Family Name: LPC1700
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4795; 935287917551

NXP Semiconductors
20. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.7.1
7.7.2
7.8
7.9
7.9.1
7.10
7.10.1
7.11
7.11.1
7.12
7.12.1
7.12.1.1
7.12.2
7.12.2.1
7.12.3
7.12.3.1
7.13
7.13.1
7.14
7.14.1
7.15
7.15.1
7.16
7.16.1
7.17
7.17.1
7.18
7.18.1
7.19
LPC1769_68_67_66_65_64_63
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering information . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning information . . . . . . . . . . . . . . . . . . . . . . 6
Functional description . . . . . . . . . . . . . . . . . . 18
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8
Architectural overview . . . . . . . . . . . . . . . . . . 18
ARM Cortex-M3 processor . . . . . . . . . . . . . . . 18
On-chip flash program memory . . . . . . . . . . . 18
On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 18
Memory Protection Unit (MPU). . . . . . . . . . . . 18
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . 19
Nested Vectored Interrupt Controller
(NVIC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 21
Pin connect block . . . . . . . . . . . . . . . . . . . . . . 21
General purpose DMA controller . . . . . . . . . . 21
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Fast general purpose parallel I/O . . . . . . . . . . 22
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
USB interface . . . . . . . . . . . . . . . . . . . . . . . . 24
USB device controller . . . . . . . . . . . . . . . . . . . 24
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
USB host controller . . . . . . . . . . . . . . . . . . . . 25
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
USB OTG controller . . . . . . . . . . . . . . . . . . . . 25
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
CAN controller and acceptance filters . . . . . . 25
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
12-bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
10-bit DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
UARTs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SPI serial I/O controller. . . . . . . . . . . . . . . . . . 27
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SSP serial I/O controller . . . . . . . . . . . . . . . . . 27
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
I
2
C-bus serial I/O controllers. . . . . . . . . . . . . . 28
All information provided in this document is subject to legal disclaimers.
Rev. 6.01 — 11 March 2011
LPC1769/68/67/66/65/64/63
7.19.1
7.20
7.20.1
7.21
7.21.1
7.22
7.22.1
7.23
7.24
7.24.1
7.25
7.25.1
7.26
7.27
7.27.1
7.28
7.28.1
7.29
7.29.1
7.29.1.1
7.29.1.2
7.29.1.3
7.29.2
7.29.3
7.29.4
7.29.5
7.29.6
7.29.6.1
7.29.6.2
7.29.6.3
7.29.6.4
7.29.6.5
7.29.7
7.29.8
7.30
7.30.1
7.30.2
7.30.3
7.30.4
7.30.5
7.30.6
7.30.7
7.31
8
9
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 42
Thermal characteristics . . . . . . . . . . . . . . . . . 43
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
I
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
General purpose 32-bit timers/external
event counters . . . . . . . . . . . . . . . . . . . . . . . . 29
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Pulse width modulator . . . . . . . . . . . . . . . . . . 30
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Motor control PWM . . . . . . . . . . . . . . . . . . . . 31
Quadrature Encoder Interface (QEI) . . . . . . . 31
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Repetitive Interrupt (RI) timer. . . . . . . . . . . . . 32
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
ARM Cortex-M3 system tick timer . . . . . . . . . 32
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 32
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
RTC and backup registers . . . . . . . . . . . . . . . 33
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Clocking and power control . . . . . . . . . . . . . . 33
Crystal oscillators . . . . . . . . . . . . . . . . . . . . . . 33
Internal RC oscillator . . . . . . . . . . . . . . . . . . . 34
Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . 34
RTC oscillator . . . . . . . . . . . . . . . . . . . . . . . . 34
Main PLL (PLL0) . . . . . . . . . . . . . . . . . . . . . . 35
USB PLL (PLL1) . . . . . . . . . . . . . . . . . . . . . . 35
RTC clock output . . . . . . . . . . . . . . . . . . . . . . 35
Wake-up timer . . . . . . . . . . . . . . . . . . . . . . . . 35
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 36
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Deep-sleep mode. . . . . . . . . . . . . . . . . . . . . . 36
Power-down mode . . . . . . . . . . . . . . . . . . . . . 37
Deep power-down mode . . . . . . . . . . . . . . . . 37
Wake-up interrupt controller . . . . . . . . . . . . . 37
Peripheral power control . . . . . . . . . . . . . . . . 37
Power domains . . . . . . . . . . . . . . . . . . . . . . . 38
System control . . . . . . . . . . . . . . . . . . . . . . . . 39
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Brownout detection . . . . . . . . . . . . . . . . . . . . 40
Code security
(Code Read Protection - CRP) . . . . . . . . . . . 40
APB interface . . . . . . . . . . . . . . . . . . . . . . . . . 40
AHB multilayer matrix . . . . . . . . . . . . . . . . . . 41
External interrupt inputs . . . . . . . . . . . . . . . . . 41
Memory mapping control . . . . . . . . . . . . . . . . 41
Emulation and debugging . . . . . . . . . . . . . . . 41
2
S-bus serial I/O controllers . . . . . . . . . . . . . 29
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
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