LPC2378FBD144,551 NXP Semiconductors, LPC2378FBD144,551 Datasheet
LPC2378FBD144,551
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LPC2377/78 Single-chip 16-bit/32-bit microcontrollers; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC Rev. 5 — 17 June 2010 1. General description The LPC2377/78 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines ...
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... NXP Semiconductors General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP serial interfaces, the I port, as well as for memory-to-memory transfers. Serial Interfaces: Ethernet MAC with associated DMA controller. These functions reside on an independent AHB. USB 2.0 full-speed device with on-chip PHY and associated DMA controller (LPC2378 only) ...
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... NXP Semiconductors On-chip crystal oscillator with an operating range of 1 MHz to 25 MHz. 4 MHz internal RC oscillator trimmed accuracy that can optionally be used as the system clock. When used as the CPU clock, does not allow CAN and USB to run. On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal ...
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... NXP Semiconductors 5. Block diagram LPC2377/78 P0, P1, P2 P3, P4 SRAM HIGH-SPEED GPI/O CONTROLLERS 104 PINS TOTAL SRAM AHB2 16 kB ETHERNET SRAM RMII(8) MAC WITH DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 × CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 × MAT2, TIMER2/TIMER3 2 × MAT0/MAT1/ MAT3 6 × PWM1 PWM1 2 × ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. LPC2377/78 pinning LPC2377_78 Product data sheet Single-chip 16-bit/32-bit microcontrollers 1 108 LPC2377FBD144 LPC2378FBD144 36 73 002aac584 All information provided in this document is subject to legal disclaimers. Rev. 5 — 17 June 2010 LPC2377/78 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin Type P0[0] to P0[31] I/O [1] P0[0]/RD1/TXD/ 66 I/O SDA1 I O I/O [1] P0[1]/TD1/RXD3/ 67 I/O SCL1 O I I/O [1] P0[2]/TXD0 141 I/O O [1] P0[3]/RXD0 142 I/O I [1] P0[4]/ 116 I/O I2SRX_CLK/ I/O ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P0[9]/ 109 I/O I2STX_SDA/ I/O MOSI1/MAT2[3] I/O O [1] P0[10]/TXD2/ 69 I/O SDA2/MAT3 [0] O I/O O [1] P0[11]/RXD2/ 70 I/O SCL2/MAT3[1] I I/O O [2] P0[12]/MISO1/ 29 I/O AD0[6] I/O I [2] P0[13]/ 32 I/O USB_UP_LED2/ O MOSI1/AD0[7] I/O ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P0[18]/DCD1/ 86 I/O MOSI0/MOSI I I/O I/O [1] P0[19]/DSR1/ 85 I/O MCICLK/SDA1 I O I/O [1] P0[20]/DTR1/ 83 I/O MCICMD/SCL1 O I I/O [1] P0[21]/RI1/ 82 I/O MCIPWR/RD1 [1] P0[22]/RTS1/ 80 I/O MCIDAT0/TD1 [2] P0[23]/AD0[0]/ 13 I/O I2SRX_CLK/ I CAP3[0] I/O ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [4] P0[28]/SCL0 34 I/O I/O [5] P0[29]/USB_D+1 42 I/O I/O [5] P0[30]/USB_D−1 43 I/O I/O [5] P0[31]/USB_D+2 36 I/O I/O P1[0] to P1[31] I/O [1] P1[0]/ 136 I/O ENET_TXD0 O [1] P1[1]/ 135 I/O ENET_TXD1 O [1] P1[4]/ 133 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P1[21]/PWM1[3]/ 50 I/O SSEL0 O I/O [1] P1[22]/MAT1[0] 51 I/O O [1] P1[23]/PWM1[4]/ 53 I/O MISO0 O I/O [1] P1[24]/PWM1[5]/ 54 I/O MOSI0 O I/O [1] P1[25]/MAT1[1] 56 I/O O [1] P1[26]/PWM1[6]/ 57 I/O CAP0[ [1] P1[27]/CAP0[1] 61 I/O I [1] P1[28]/ ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P2[1]/PWM1[2]/ 106 I/O RXD1/ O PIPESTAT0 I O [1] P2[2]/PWM1[3]/ 105 I/O CTS1/ O PIPESTAT1 I O [1] P2[3]/PWM1[4]/ 100 I/O DCD1/ O PIPESTAT2 I O [1] P2[4]/PWM1[5]/ 99 I/O DSR1/ O TRACESYNC I O [1] P2[5]/PWM1[6]/ 97 I/O DTR1/ O TRACEPKT0 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [6] P2[11]/EINT1/ 75 I/O MCIDAT1/ I I2STX_CLK O I/O [6] P2[12]/EINT2/ 73 I/O MCIDAT2/ I I2STX_WS O I/O [6] P2[13]/EINT3/ 71 I/O MCIDAT3/ I I2STX_SDA O I/O P3[0] to P3[31] I/O [1] P3[0]/D0 137 I/O I/O [1] P3[1]/D1 140 I/O I/O [1] P3[2]/D2 144 I/O ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P3[25]/MAT0[0]/ 39 I/O PWM1[ [1] P3[26]/MAT0[1]/ 38 I/O PWM1[ P4[0] to P4[31] I/O [1] P4[0]/A0 52 I/O I/O [1] P4[1]/A1 55 I/O I/O [1] P4[2]/A2 58 I/O I/O [1] P4[3]/A3 68 I/O I/O [1] P4[4]/A4 72 I/O I/O [1] P4[5]/A5 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P4[24]/OE 127 I/O O [1] P4[25]/BLS0 124 I/O O [1] P4[28]/MAT2[0]/ 118 I/O TXD3 O O [1] P4[29]/MAT2[1]/ 122 I/O RXD3 O I [1] P4[30]/CS0 130 I/O O [1] P4[31]/CS1 134 I/O O [8] ALARM ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type V 41, 62, I DD(3V3) 77, 102, 114, [13] 138 n.c. 21, 81, I [14 18, 60, I DD(DCDC)(3V3) [15] 121 [16 DDA [16] VREF 17 I [16] VBAT tolerant pad providing digital I/O functions with TTL levels and hysteresis. [ tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input, digital section of the pad is disabled ...
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... NXP Semiconductors 7. Functional description 7.1 Architectural overview The LPC2377/78 microcontrollers consist of an ARM7TDMI-S CPU with emulation support, the ARM7 local bus for closely coupled, high-speed access to the majority of on-chip memory, the AMBA AHB interfacing to high-speed on-chip peripherals and external memory, and the AMBA APB for connection to other on-chip peripheral functions. ...
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... NXP Semiconductors The Thumb set’s 16-bit instruction length allows it to approach twice the density of standard ARM code while retaining most of the ARM’s performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code. ...
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... NXP Semiconductors 7.4 Memory map The LPC2377/78 memory map incorporates several distinct regions as shown in In addition, the CPU interrupt vectors may be remapped to allow them to reside in either flash memory (default), boot ROM, or SRAM (see 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB Fig 3. ...
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... NXP Semiconductors 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...
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... NXP Semiconductors 7.7.1 Features • Asynchronous static memory device support including RAM, ROM, and flash, with or without asynchronous page mode • Low transaction latency • Read and write buffers to reduce latency and to improve performance • 8 data and 16 address lines wide static memory support • ...
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... NXP Semiconductors • 32-bit AHB master bus width. • Incrementing or non-incrementing addressing for source and destination. • Programmable DMA burst size. The DMA burst size can be programmed to more efficiently transfer data. Usually the burst size is set to half the size of the FIFO in the peripheral. • ...
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... NXP Semiconductors 7.10 Ethernet The Ethernet block contain a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity ...
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... NXP Semiconductors • Physical interface: – Attachment of external PHY chip through standard RMII interface. – PHY register access is available via the MIIM interface. 7.11 USB interface (LPC2378 only) The Universal Serial Bus (USB 4-wire bus that supports communication between a host and a number (127 maximum) of peripherals. The host controller allocates the USB bandwidth to attached devices through a token based protocol ...
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... NXP Semiconductors 7.12 CAN controller and acceptance filters (LPC2378 only) The Controller Area Network (CAN serial communications protocol which efficiently supports distributed real-time control with a very high level of security. Its domain of application ranges from high-speed networks to low cost multiplex wiring. The CAN block is intended to support multiple CAN buses simultaneously, allowing the device to be used as a gateway, switch, or router among a number of CAN buses in industrial or automotive applications ...
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... NXP Semiconductors 7.14 10-bit DAC The DAC allows the LPC2377/78 to generate a variable analog output. The maximum output value of the DAC is V 7.14.1 Features • 10-bit DAC • Resistor string architecture • Buffered output • Power-down mode • Selectable output drive 7.15 UARTs The LPC2377/78 contain four UARTs ...
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... NXP Semiconductors 7.17 SSP serial I/O controller The LPC2377/78 contain two SSP controllers. The SSP controller is capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the bus. Only a single master and a single slave can communicate on the bus during a given data transfer ...
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... NXP Semiconductors 7.19.1 Features • standard I • and I devices connected to the same bus lines. • Easy to configure as master, slave, or master/slave. • Programmable clocks allow versatile rate control. • Bidirectional data transfer between masters and slaves. • Multi-master bus (no central master). • ...
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... NXP Semiconductors 7.21 General purpose 32-bit timers/external event counters The LPC2377/78 include four 32-bit Timer/Counters. The Timer/Counter is designed to count cycles of the system derived clock or an externally-supplied clock. It can optionally generate interrupts or perform other actions at specified timer values, based on four match registers. The Timer/Counter also includes four capture inputs to trap the timer value when an input signal transitions, optionally generating an interrupt ...
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... NXP Semiconductors Three match registers can be used to provide a PWM output with both edges controlled. Again, the PWMMR0 match register controls the PWM cycle rate. The other match registers control the two PWM edge positions. Additional double edge controlled PWM outputs require only two match registers each, since the repetition rate is the same for all PWM outputs ...
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... NXP Semiconductors 7.23 Watchdog timer The purpose of the watchdog is to reset the microcontroller within a reasonable amount of time if it enters an erroneous state. When enabled, the watchdog will generate a system reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined amount of time. ...
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... NXP Semiconductors 7.24 RTC and battery RAM The RTC is a set of counters for measuring time when system power is on, and optionally when it is off. It uses little power in Power-down and Deep power-down modes. On the LPC2377/78, the RTC can be clocked by a separate 32.768 kHz oscillator programmable prescale divider based on the APB clock ...
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... NXP Semiconductors 7.25.1.2 Main oscillator The main oscillator can be used as the clock source for the CPU, with or without using the PLL. The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted to a higher frequency the maximum CPU operating frequency, by the PLL ...
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... NXP Semiconductors sufficient amplitude to drive the clock logic. The amount of time depends on many factors, including the rate of V electrical characteristics (if a quartz crystal is used), as well as any other external circuitry (e.g., capacitors), and the characteristics of the oscillator itself under the existing ambient conditions ...
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... NXP Semiconductors 7.25.4.3 Power-down mode Power-down mode does everything that Sleep mode does, but also turns off the IRC oscillator and the flash memory. This saves more power, but requires waiting for resumption of flash operation before execution of code or data access in the flash memory can be accomplished ...
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... NXP Semiconductors The VBAT pin supplies power only to the RTC and the battery RAM. These two functions require a minimum of power to operate, which can be supplied by an external battery. When the CPU and the rest of chip functions are stopped and power removed, the RTC can supply an alarm output that may be used by external hardware to restore chip power and resume operation ...
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... NXP Semiconductors Running an application with level CRP3 selected fully disables any access to chip via the JTAG pins and the ISP. This mode effectively disables ISP override using P2[10] pin, too the user’s application to provide (if needed) flash update mechanism using IAP calls or call reinvoke ISP command to enable flash update via UART0 ...
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... NXP Semiconductors 7.27.1 EmbeddedICE The EmbeddedICE logic provides on-chip debug support. The debugging of the target system requires a host computer running the debugger software and an EmbeddedICE protocol convertor. The EmbeddedICE protocol convertor converts the Remote Debug Protocol commands to the JTAG data needed to access the ARM7TDMI-S core present on the target system ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF ...
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... NXP Semiconductors 9. Thermal characteristics The average chip junction temperature, T equation amb • ambient temperature (°C), amb • the package junction-to-ambient thermal resistance (°C/W) th(j-a) • sum of internal and I/O power dissipation D The internal power dissipation is the product of I the I/O pins is often small and many times can be negligible. However it can be significant in some applications ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 analog 3.3 V pad DDA supply voltage V input voltage on pin i(VBAT) VBAT ...
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... NXP Semiconductors Table 6. Static characteristics …continued − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I I/O latch-up current latch V input voltage I V output voltage O V HIGH-level input IH voltage V LOW-level input IL voltage V hysteresis voltage hys V HIGH-level output OH voltage ...
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... NXP Semiconductors Table 6. Static characteristics …continued − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V output voltage on pin o(RTCX2) RTCX2 USB pins (LPC2378 only) I OFF-state output OZ current V bus supply voltage BUS V differential input DI sensitivity V differential common CM mode voltage range ...
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... NXP Semiconductors 10.1 Power-down mode 4 I DD(IO) (μ −2 −4 −40 V i(VBAT) Fig 4. I/O maximum supply current BAT (μ −40 V Fig 5. RTC battery maximum supply current I mode LPC2377_78 Product data sheet − ° 3 DD(DCDC)(3V3) amb versus temperature in Power-down mode DD(IO ...
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... NXP Semiconductors 800 I DD(DCDC)pd(3v3) (μA) 600 400 200 0 −40 V DD(3V3) Fig 6. Total DC-to-DC converter supply current I in Power-down mode 10.2 Deep power-down mode 300 I DD(IO) (μA) 200 100 0 −40 V Fig 7. I/O maximum supply current I mode LPC2377_78 Product data sheet V = 3.3 V DD(DCDC)(3V3 ...
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... NXP Semiconductors 40 I BAT (μ −40 V Fig 8. RTC battery maximum supply current I power-down mode 100 I DD(DCDC)dpd(3v3) (μ −40 V DD(3V3) Fig 9. Total DC-to-DC converter maximum supply current I temperature in Deep power-down mode LPC2377_78 Product data sheet V = 3.3 V i(VBAT 3.0 V i(VBAT) − ° 3 DD(3V3) ...
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... NXP Semiconductors 10.3 Electrical pin characteristics 3 (V) 3.2 2.8 2.4 2.0 Conditions: V Fig 10. Typical HIGH-level output voltage (mA Conditions: V Fig 11. Typical LOW-level output current I LPC2377_78 Product data sheet °C 25 °C −40 ° 3.3 V; standard port pins. DD(3V3 0.2 = 3.3 V; standard port pins. ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics − ° ° +85 C for commercial applications; V amb Symbol Parameter External clock (see Figure 12) f oscillator frequency osc T clock cycle time cy(clk) t clock HIGH time CHCX t clock LOW time CLCX t clock rise time CLCH ...
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... NXP Semiconductors 11.1 Internal oscillators Table 8. Dynamic characteristic: internal oscillators − ° ° ≤ + amb DD(3V3) Symbol Parameter f internal RC oscillator frequency osc(RC) f RTC input frequency i(RTC) [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages. ...
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... NXP Semiconductors 11.4 Flash memory Table 11. Dynamic characteristics of flash − ° ° +85 C, unless otherwise specified; V amb ground. Symbol Parameter N endurance endu t retention time ret [1] Number of program/erase cycles. [2] t specified for < 1ppm. ret LPC2377_78 Product data sheet Single-chip 16-bit/32-bit microcontrollers = 3 3.6 V; all voltages are measured with respect to ...
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Static external memory interface Table 12. Dynamic characteristics: Static external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol ...
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... NXP Semiconductors 11.6 Timing CS addr data t CSLOEL OE Fig 13. External memory read access CS BLS addr data OE Fig 14. External memory write access LPC2377_78 Product data sheet Single-chip 16-bit/32-bit microcontrollers t CSLAV OELAV t OELOEH t CSLAV t BLSLBLSH t t CSLBLSL BLSDV t CSLDV All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors T PERIOD crossover point differential data lines differential data to SE0/EOP skew n × T Fig 15. Differential data-to-EOP transition skew and EOP width shifting edges SCK MOSI MISO Fig 16. MISO line set-up time in SSP Master mode LPC2377_78 Product data sheet crossover point extended ...
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... NXP Semiconductors 12. ADC electrical characteristics Table 13. ADC electrical characteristics − ° 2 3 +85 DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G E absolute error T R voltage source interface ...
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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error ( (4) Integral non-linearity (E ). L(adj) (5) Center of a step of the actual transfer curve. Fig 17. ADC characteristics LPC2377_78 Product data sheet ...
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... NXP Semiconductors AD0[y] SAMPLE Fig 18. Suggested ADC interface - LPC2377/78 AD0[y] pin LPC2377_78 Product data sheet Single-chip 16-bit/32-bit microcontrollers LPC23XX 20 kΩ AD0[ All information provided in this document is subject to legal disclaimers. Rev. 5 — 17 June 2010 LPC2377/78 R vsi V EXT 002aac610 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 13. DAC electrical characteristics Table 14. DAC electrical characteristics − ° 3 3 +85 DDA amb Symbol Parameter E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G C load capacitance L R load resistance L 14. Application information 14.1 Suggested USB interface solutions (LPC2378 only) LPC23XX Fig 19 ...
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... NXP Semiconductors LPC23XX Fig 20. LPC2378 USB interface on a bus-powered device 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through a capacitor with C = 100 pF ...
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... NXP Semiconductors Fig 22. Oscillator modes and models: oscillation mode of operation and external crystal model used for C Table 15. Fundamental oscillation frequency F 1 MHz to 5 MHz 5 MHz to 10 MHz 10 MHz to 15 MHz 15 MHz to 20 MHz Table 16. Fundamental oscillation frequency F 15 MHz to 20 MHz ...
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... NXP Semiconductors 14.3 RTC 32 kHz oscillator component selection Fig 23. RTC oscillator modes and models: oscillation mode of operation and external crystal model used for C The RTC external oscillator circuit is shown in integrated on chip, only a crystal, the capacitances C externally to the microcontroller. Table 17 gives the crystal parameters that should be used. C capacitance of the crystal and is usually specified by the crystal manufacturer ...
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... NXP Semiconductors 14.5 Standard I/O pin configuration Figure 24 shows the possible pin modes for standard I/O pins with analog input function: • Digital output driver: Open-drain mode enabled/disabled • Digital input: Pull-up enabled/disabled • Digital input: Pull-down enabled/disabled • Digital input: Repeater mode enabled/disabled • ...
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... NXP Semiconductors 14.6 Reset pin configuration reset Fig 25. Reset pin configuration LPC2377_78 Product data sheet Single-chip 16-bit/32-bit microcontrollers GLITCH FILTER All information provided in this document is subject to legal disclaimers. Rev. 5 — 17 June 2010 LPC2377/ ESD PIN ESD V SS 002aaf274 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 15. Package outline LQFP144: plastic low profile quad flat package; 144 leads; body 1 108 109 pin 1 index 144 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 0.27 mm 1.6 0.25 0.05 1.35 0.17 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 16. Abbreviations Table 18. Acronym ADC AHB AMBA APB BLS BOD CAN CTS DAC DCC DMA DSP EOP ETM GPIO JTAG MII MIIM PHY PLL PWM RMII RTS SE0 SPI SSI SSP TTL UART USB LPC2377_78 Product data sheet Acronym list ...
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... NXP Semiconductors 17. Revision history Table 19. Revision history Document ID Release date LPC2377_78 v.5 20100617 • Modifications: Table 3 “Pin • Table 3 “Pin • Table 4 “Limiting • Table 6 “Static • Table 6 “Static • Table 6 “Static • Table 6 “Static I BATact • Added • Table 12 “Dynamic characteristics: Static external memory • ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . 16 7.1 Architectural overview . . . . . . . . . . . . . . . . . . 16 7.2 On-chip flash programming memory . . . . . . . 17 7.3 On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 17 7 ...
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... NXP Semiconductors 13 DAC electrical characteristics . . . . . . . . . . . . 56 14 Application information 14.1 Suggested USB interface solutions (LPC2378 only 14.2 Crystal oscillator XTAL input and component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 14.3 RTC 32 kHz oscillator component selection . . 59 14.4 XTAL and RTCX Printed Circuit Board (PCB) layout guidelines . . . . . . . . . . . . . . . . . 59 14.5 Standard I/O pin configuration . . . . . . . . . . . . 60 14 ...