STM8S903K3T6C STMicroelectronics, STM8S903K3T6C Datasheet
STM8S903K3T6C
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STM8S903K3T6C Summary of contents
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MHz STM8S 8-bit MCU Kbytes Flash, 1 Kbyte RAM, 640 bytes EEPROM,10-bit ADC, 2 timers, UART, SPI, I²C LQFP32 7x7 UFQFPN32 5x5 TSSOP20 Features Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage ...
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Contents Contents 1 Introduction ..............................................................................................................8 2 Description ...............................................................................................................9 3 Block diagram ........................................................................................................10 4 Product overview ...................................................................................................11 4.1 Central processing unit STM8 .....................................................................................11 4.2 Single wire interface module (SWIM) and debug module (DM) ..................................11 4.3 Interrupt controller .......................................................................................................12 4.4 Flash program ...
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STM8S903K3 STM8S903F3 10.1 Parameter conditions .................................................................................................48 10.1.1 Minimum and maximum values .........................................................48 10.1.2 Typical values .....................................................................................48 10.1.3 Typical curves ....................................................................................48 10.1.4 Loading capacitor ...............................................................................48 10.1.5 Pin input voltage .................................................................................49 10.2 Absolute maximum ratings ........................................................................................49 10.3 Operating conditions ..................................................................................................51 10.3.1 VCAP ...
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List of tables List of tables Table 1. STM8S903K3/F3 access line features .......................................................................................9 Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers ..................................14 Table 3. TIM timer features ....................................................................................................................16 Table 4. Legend/abbreviations for pinout tables ...................................................................................19 Table 5. TSSOP20/SO20/UFQFPN32/LQFP32/SDIP32 ...
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STM8S903K3 STM8S903F3 Table 48. ADC accuracy with R Table 49. EMS data ................................................................................................................................87 Table 50. EMI data .................................................................................................................................88 Table 51. ESD absolute maximum ratings .............................................................................................89 Table 52. Electrical sensitivities .............................................................................................................89 Table 53. 32-pin low profile quad flat package mechanical data ...
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List of figures List of figures Figure 1. Block diagram .........................................................................................................................10 Figure 2. Flash memory organization ....................................................................................................13 Figure 3. STM8S903K3/F3 TSSOP20/SO20 pinout ..............................................................................21 Figure 4. STM8S903K3/F3 UFQFPN32/LQFP32 pinout .......................................................................21 Figure 5. STM8S903K3/F3 SDIP32 pinout ............................................................................................22 Figure 6. Memory map ...........................................................................................................................25 ...
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STM8S903K3 STM8S903F3 Figure 48. Recommended footprint without on-board emulation ...........................................................95 Figure 49. 32-lead shrink plastic DIP (400 ml) package ........................................................................95 Figure 50. 20-pin, 4.40 mm body, 0.65 mm pitch ...................................................................................98 Figure 51. 20-lead, plastic small outline (300 mils) package .................................................................98 ...
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Introduction 1 Introduction This datasheet contains the description of the device features, pinout, electrical characteristics, mechanical data and ordering information. • For complete information on the STM8S microcontroller memory, registers and peripherals, please refer to the STM8S microcontroller family reference ...
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STM8S903K3 STM8S903F3 2 Description The STM8S903K3 and STM8S903F3 8-bit microcontrollers offer 8 Kbytes Flash program memory, plus integrated true data EEPROM. The STM8S microcontroller family reference manual (RM0016) refers to devices in this family as low-density. They provide the following ...
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Block diagram 3 Block diagram Reset Single wire debug interf. 400 Kbit/s 8 Mbit/s LIN master SPI emul channels 1/2/4 kHz beep 10/113 Figure 1: Block diagram Reset block Clock controller Reset Detector POR BOR Clock to ...
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STM8S903K3 STM8S903F3 4 Product overview The following section intends to give an overview of the basic features of the device functional modules and peripherals. For more detailed information please refer to the corresponding family reference manual (RM0016). 4.1 Central processing ...
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Product overview SWIM Single wire interface module for direct access to the debug module and memory programming. The interface can be activated in all device operation modes. The maximum data transmission speed is 145 bytes/ms. Debug module The non-intrusive debugging ...
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STM8S903K3 STM8S903F3 program, specific code libraries, reset and interrupt vectors, the reset routine and usually the IAP and communication routines. Data EEPROM memory Low density Flash program memory (8 Kbytes) Read-out protection (ROP) The read-out protection blocks reading and ...
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Product overview - MHz high-speed user-external clock (HSE user-ext MHz high-speed internal RC oscillator (HSI) - 128 kHz low-speed internal RC (LSI) • Startup clock: After reset, the microcontroller restarts by default with an internal ...
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STM8S903K3 STM8S903F3 Activation of the watchdog timers is controlled by option bytes or by software. Once activated, the watchdogs cannot be disabled by the user program without performing a reset. Window watchdog timer The window watchdog is used to detect ...
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Product overview • Synchronization module to control the timer with external signals or to synchronise with TIM5 or TIM6 • Break input to force the timer outputs into a defined state • Three complementary outputs with adjustable dead time • ...
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STM8S903K3 STM8S903F3 • Conversion time: 14 clock cycles • Single and continuous and buffered continuous conversion modes • Buffer size ( bits) where n = number of input channels • Scan mode for single and continuous conversion of ...
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Product overview • Transmission error detection with interrupt generation • Parity control Synchronous communication • Full duplex synchronous transfers • SPI master operation • 8-bit data communication • Maximum speed: 1 Mbit MHz (f LIN master mode • ...
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STM8S903K3 STM8S903F3 5 Pinout and pin description Type Level Output speed Port and control configuration Reset state Table 4: Legend/abbreviations for pinout tables I= Input Output Power supply CM = CMOS Input Output HS = High ...
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Pinout and pin description 5.1 STM8S903K3/F3 TSSOP20/SO20 pinout TIM5_CH1[UART1_CK]BEEP/PD4(HS) AIN5/UART1_TX/PD5(HS) AIN6/UART1_RX/PD6(HS) [UART1_TX][SPI_NSS]/TIM5_CH3/PA3(HS) 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function ...
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STM8S903K3 STM8S903F3 5.2 STM8S903K3/F3 UFQFPN32/LQFP32/SDIP32 pinout [UART1_TX] [SPI_NSS] TIM5_CH3/(HS) PA3 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is shown ...
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Pinout and pin description AIN4/TIM5_CH2/ADC_ETR/PD3(HS) TIM5_CH1[UART1_CK]BEEP/PD4(HS) AIN5/UART1_TX/PD5(HS) AIN6/UART1_RX/PD6(HS) [TIM1_CH4]TLI/PD7(HS) [UART1_TX][SPI_NSS]/TIM5_CH3/PA3(HS) [TIM1_BKIN]I2C_SDA/PB5(T) 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is ...
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STM8S903K3 STM8S903F3 SDIP UFQFPN/ Pin name SO20 32 LQFP32 15 10 PB6 PB5/ I2C_SDA [TIM1_BKIN PB4/ I2C_SCL [ADC_ETR PB3/ AIN3/TIM1_ETR 19 14 PB2/ AIN2/ TIM1_CH3N 20 15 ...
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Pinout and pin description 5.4 Alternate function remapping As shown in the rightmost column of the pin description table, some alternate functions can be remapped at different I/O ports by programming one of eight AFR (alternate function remap) option bits. ...
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STM8S903K3 STM8S903F3 6 Memory and register map 6.1 Memory map Figure 6: Memory map 0x00 0000 RAM (1 Kbyte) 513 bytes stack 0x00 03FF 0x00 0800 Reserved 0x00 3FFF 0x00 4000 640 bytes data EEPROM 0x00 427F 0x00 4280 Reserved ...
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Memory and register map 6.2 Register map 6.2.1 I/O port hardware register map Address Block 0x00 5000 0x00 5001 0x00 5002 Port A 0x00 5003 0x00 5004 0x00 5005 0x00 5006 0x00 5007 Port B 0x00 5008 0x00 5009 0x00 ...
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STM8S903K3 STM8S903F3 Address Block 0x00 5018 Port E 0x00 5019 0x00 501A Port F 0x00 501B 0x00 501C 0x00 501D 6.2.2 General hardware register map Address Block Reserved area (60 bytes) 0x00 501E to 0x00 5059 Flash 0x00 505A 0x00 ...
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Memory and register map Address Block Reserved area (59 bytes) 0x00 5065 to 0x00 509F ITC 0x00 50A0 0x00 50A1 Reserved area (17 bytes) 0x00 50A2 to 0x00 50B2 RST 0x00 50B3 Reserved area (12 bytes) 0x00 50B4 to 0x00 ...
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STM8S903K3 STM8S903F3 Address Block 0x00 50CC 0x00 50CD Reserved area (3 bytes) 0x00 50CE to 0x00 50D0 WWDG 0x00 50D1 0x00 50D2 Reserved area (13 bytes) 0x00 50D3 to 00 50DF IWDG 0x00 50E0 0x00 50E1 0x00 50E2 Reserved area ...
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Memory and register map Address Block 0x00 5202 0x00 5203 0x00 5204 0x00 5205 0x00 5206 0x00 5207 Reserved area (8 bytes) 0x00 5208 to 0x00 520F 0x00 5210 0x00 5211 0x00 5212 0x00 5213 0x00 5214 ...
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STM8S903K3 STM8S903F3 Address Block 0x00 521C 0x00 521D 0x00 521E Reserved area (17 bytes) 0x00 521F to 0x00 522F UART1 0x00 5230 0x00 5231 0x00 5232 0x00 5233 0x00 5234 0x00 5235 0x00 5236 0x00 5237 0x00 5238 0x00 5239 ...
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Memory and register map Address Block 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B 0x00 525C 0x00 525D 0x00 525E 0x00 525F 0x00 5260 0x00 5261 0x00 5262 ...
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STM8S903K3 STM8S903F3 Address Block 0x00 5266 0x00 5267 0x00 5268 0x00 5269 0x00 526A 0x00 526B 0x00 526C 0x00 526D 0x00 526E 0x00 526F Reserved area (147 bytes) 0x00 5270 to 0x00 52FF TIM5 0x00 5300 0x00 5301 0x00 5302 ...
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Memory and register map Address Block 0x00 5308 0x00 5309 0x00 530A 0x00 530B 00 530C0x 0x00 530D 0x00 530E 0x00 530F 0x00 5310 0x00 5311 0x00 5312 0x00 5313 0x00 5314 0x00 5315 0x00 5316 Reserved area (43 bytes) ...
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STM8S903K3 STM8S903F3 Address Block 0x00 5343 0x00 5344 0x00 5345 0x00 5346 0x00 5347 0x00 5348 Reserved area (153 bytes) 0x00 5349 to 0x00 53DF ADC1 0x00 53E0 to 0x00 53F3 Reserved area (12 bytes) 0x00 53F4 to 0x00 53FF ...
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Memory and register map Address Block 0x00 5409 0x00 540A 0x00 540B 0x00 540C 0x00 540D 0x00 540E 0x00 540F Reserved area (1008 bytes) 0x00 5410 to 0x00 57FF (1) Depends on the previous reset source. (2) Write only register. ...
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STM8S903K3 STM8S903F3 Address Block 0x00 7F09 0x00 7F0A 0x00 7F0B to 0x00 7F5F 0x00 7F60 CPU 0x00 7F70 0x00 7F71 0x00 7F72 0x00 7F73 ITC 0x00 7F74 0x00 7F75 0x00 7F76 0x00 7F77 0x00 7F78 to 0x00 7F79 0x00 7F80 ...
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Memory and register map Address Block 0x00 7F9A 0x00 7F9B to 0x00 7F9F (1) Accessible by debug module only 38/113 Register label Register name DM_ENFCTR DM enable function register Reserved area (5 bytes) DocID15590 Rev 5 STM8S903K3 STM8S903F3 Reset status ...
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STM8S903K3 STM8S903F3 7 Interrupt vector mapping IRQ Source Description no. block RESET Reset TRAP Software interrupt 0 TLI External top level interrupt 1 AWU Auto wake up from halt 2 CLK Clock controller 3 EXTI0 Port A external interrupts 4 ...
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Interrupt vector mapping IRQ Source Description no. block 23 TIM6 TIM6 update/ overflow/ trigger 24 Flash EOP/ WR_PG_DIS Reserved (1) Except PA1 40/113 Wakeup from Wakeup from halt mode active-halt mode - - - - DocID15590 Rev 5 STM8S903K3 STM8S903F3 ...
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STM8S903K3 STM8S903F3 8 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated block of the memory. Except for the ROP (read-out protection) byte, each ...
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Option bytes Option byte no. OPT1 OPT2 OPT3 42/113 Description Note: Refer to the family reference manual (RM0016) section on Flash/EEPROM memory readout protection for details. UBC[7:0] User boot code area 0x00: no UBC, no write-protection 0x01: Page 0 defined ...
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STM8S903K3 STM8S903F3 Option byte no. OPT4 OPT5 8.1 STM8S903K3/F3 alternate function remapping bits Table 12: STM8S903K3 alternate function remapping bits [7:2] for 32-pin packages Option byte no. OPT2 Description 0: No reset generated on halt if WWDG active 1: Reset ...
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Option bytes Option byte no. (1) Do not use more than one remapping option in the same port. (2) Refer to pinout description. Table 13: STM8S903F3 alternate function remapping bits [7:2] for 20-pin packages Option byte no. OPT2 44/113 (1) ...
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STM8S903K3 STM8S903F3 Option byte no. (1) Do not use more than one remapping option in the same port. (2) Refer to pinout description. Table 14: STM8S903K3 alternate function remapping bits [1:0] for 32-pin packages AFR1 option bit value 0 0 ...
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Option bytes Table 15: STM8S903F3 alternate function remapping bits [1:0] for 20-pin packages AFR1 option bit value (1) Refer to pinout description. 46/113 AFR0 option bit I/O port value 0 AFR1 and AFR0 remapping options inactive: ...
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STM8S903K3 STM8S903F3 9 Unique ID The devices feature a 96-bit unique device identifier which provides a reference number that is unique for any device and in any context. The 96 bits of the identifier can never be altered by the ...
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Electrical characteristics 10 Electrical characteristics 10.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 10.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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STM8S903K3 STM8S903F3 10.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in the following figure. 10.2 Absolute maximum ratings Stresses above those listed as ‘absolute maximum ratings’ may cause permanent damage to the ...
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Electrical characteristics Symbol Ratings I VDD Total current into V I Total current out of V VSS I IO Output current sunk by any I/O and control pin Output current source by any I/Os and control pin (3) (4) I ...
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STM8S903K3 STM8S903F3 10.3 Operating conditions Symbol Parameter f Internal CPU clock frequency CPU V Standard operating voltage DD VCAP C : capacitance of external EXT (1) capacitor ESR of external capacitor ESL of external capacitor (2) P Power dissipation at ...
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Electrical characteristics f CPU (MHz) Functionality not guaranteed in this area Table 21: Operating conditions at power-up/power-down Symbol Parameter t V VDD Reset releasedelay TEMP V Power-on reset IT+ threshold V Brown-out reset IT- threshold V ...
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STM8S903K3 STM8S903F3 1. ESR is the equivalent series resistance and ESL is the equivalent inductance. 10.3.2 Supply current characteristics The current consumption is measured as described in 10.3.2.1 Total current consumption in run mode The MCU is placed under the ...
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Electrical characteristics Symbol Parameter Conditions f CPU 2 MHz f CPU Supply current 125 kHz in run mode, I DD(RUN) code executed f CPU from Flash 15.625 kHz f CPU 128 kHz (1) Data based on characterization results, not tested ...
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STM8S903K3 STM8S903F3 Symbol Parameter Conditions 128 = 125 kHz f CPU 128 = 15.625 kHz f CPU 128 kHz (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. 10.3.2.2 Total ...
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Electrical characteristics Symbol Parameter Conditions (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. 10.3.2.3 Total current consumption in active halt mode Table 26: Total current consumption in active halt ...
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STM8S903K3 STM8S903F3 Conditions Main Symbol Parameter voltage regulator (MVR) Supply current I in active halt DD(AH) mode Off Supply current I in active halt DD(AH) mode (1) Data based on characterization results, not tested in production (2) Configured by the ...
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Electrical characteristics 10.3.2.4 Total current consumption in halt mode Table 28: Total current consumption in halt mode at V Symbol Parameter Supply current in halt mode I DD(H) (1) Data based on characterization results, not tested in production Table 29: ...
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STM8S903K3 STM8S903F3 Symbol Parameter Wakeup time active halt mode to run (3) mode Wakeup time active halt mode to run (3) mode Wakeup time from halt mode to run t WU(H) (3) mode (1) Data guaranteed by design, not tested ...
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Electrical characteristics HSI internal RC/f Symbol Parameter I TIM1 supply current DD(TIM1) I TIM5 supply current DD(TIM5) I TIM6 timer supply current DD(TIM6) I UART1 supply current DD(UART1) I SPI supply current DD(SPI DD ...
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STM8S903K3 STM8S903F3 Figure 12: Typ I Figure 13: Typ I vs. f HSE user external clock, V DD(RUN) CPU vs. V HSI RC osc, f DD(RUN) DD DocID15590 Rev 5 Electrical characteristics = MHz CPU ...
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Electrical characteristics Figure 14: Typ I Figure 15: Typ I Figure 16: Typ I 62/113 vs. V HSE user external clock, f DD(WFI) DD vs. f HSE user external clock, V DD(WFI) CPU vs. V HSI RC osc, f DD(WFI) ...
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STM8S903K3 STM8S903F3 10.3.3 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for V Table 33: HSE user external clock characteristics Symbol Parameter f User external clock source HSE_ext frequency (1) V OSCIN input ...
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Electrical characteristics Symbol Parameter R Feedback resistor F (1) C Recommended load (2) capacitance I HSE oscillator power DD(HSE) consumption g Oscillator m transconductance (4) t Startup time SU(HSE) ( approximately equivalent crystal Cload. (2) ...
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STM8S903K3 STM8S903F3 R : Notional resistance (see crystal specification Notional inductance (see crystal specification Notional capacitance (see crystal specification) m Co: Shunt capacitance (see crystal specification Grounded external capacitance ...
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Electrical characteristics Figure 19: Typical HSI accuracy at V Figure 20: Typical HSI frequency variation vs V Low speed internal RC oscillator (LSI) Subject to general operating conditions for V Symbol Parameter f Frequency LSI t LSI oscillator wake-up time ...
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STM8S903K3 STM8S903F3 Figure 21: Typical LSI frequency variation vs V 10.3.5 Memory characteristics RAM and hardware registers Symbol Parameter V Data retention mode RM (1) Minimum supply voltage without losing data stored in RAM (in halt mode or under reset) ...
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Electrical characteristics Symbol Parameter 1 block (64 bytes) t Erase time for 1 block erase (64 bytes) N Erase/write cycles RW (program memory) Erase/write cycles (data memory) t Data retention (program RET and data memory) after 10k erase/write cycles at ...
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STM8S903K3 STM8S903F3 Symbol Parameter V IH Input high level voltage V (1) hys Hysteresis R pu Pull-up resistor Rise and fall time ( lkg Digital input leakage current I lkg ...
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Electrical characteristics Figure 23: Typical pull-up resistance vs V Figure 24: Typical pull-up current vs V Symbol Parameter Output low level with 8 pins sunk V OL Output low level with 4 pins sunk Output high level with 8 pins ...
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STM8S903K3 STM8S903F3 Symbol Parameter Output high level with 4 pins sourced (1) Data based on characterization results, not tested in production Table 41: Output driving current (true open drain ports) Symbol Parameter V Output low level with 2 pins sunk ...
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Electrical characteristics 72/113 Figure 25: Typ (standard ports Figure 26: Typ 3.3 V (standard ports DocID15590 Rev 5 STM8S903K3 STM8S903F3 ...
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STM8S903K3 STM8S903F3 Figure 27: Typ. V Figure 28: Typ (true open drain ports 3.3 V (true open drain ports DocID15590 Rev 5 Electrical characteristics 73/113 ...
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Electrical characteristics 74/113 Figure 29: Typ (high sink ports Figure 30: Typ 3.3 V (high sink ports DocID15590 Rev 5 STM8S903K3 STM8S903F3 ...
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STM8S903K3 STM8S903F3 Figure 32: Typ. V Figure 31: Typ DocID15590 Rev 5 Electrical characteristics = 5 V (standard ports 3.3 V (standard ports) DD 75/113 ...
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Electrical characteristics Figure 34: Typ. V 10.3.7 Reset pin characteristics Subject to general operating conditions for V Symbol Parameter V IL(NRST) NRST input low (1) level voltage 76/113 Figure 33: Typ ...
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STM8S903K3 STM8S903F3 Symbol Parameter V IH(NRST) NRST input high level voltage V OL(NRST) NRST output low level voltage R PU(NRST) NRST pull-up (2) resistor t I FP(NRST) NRST input filtered (3) pulse t IN FP(NRST) NRST input not filtered pulse ...
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Electrical characteristics Figure 36: Typical NRST pull-up resistance vs V Figure 37: Typical NRST pull-up current vs V The reset network shown in the following figure protects the device against parasitic resets. The user must ensure that the level on ...
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STM8S903K3 STM8S903F3 External reset circuit (optional) 10.3.8 SPI serial peripheral interface Unless otherwise specified, the parameters given in the following table are derived from tests performed under ambient temperature 1/f MASTER MASTER Refer to I/O port characteristics ...
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Electrical characteristics Symbol Parameter (3) t Data input hold h(MI) (3) t time h(SI) (3) (4) t Data output a(SO) access time (3) (5) t Data output dis(SO) disable time (3) t Data output valid v(SO) time (3) t Data ...
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STM8S903K3 STM8S903F3 Figure 39: SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure ...
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Electrical characteristics NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO INP UT MOSI OUTUT 1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD. 2 10.3 interface characteristics Symbol Parameter ...
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STM8S903K3 STM8S903F3 Symbol Parameter t STOP condition setup time su(STO) t STOP to START condition time w(STO:ST A) (bus free) C Capacitive load for each bus line b ( must be at least 8 MHz to achieve max ...
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Electrical characteristics Symbol Parameter V Conversion voltage range AIN V Internal bandgap reference BGREF voltage C Internal sample and hold ADC capacitor (1) t Minimum sampling time S t Wake-up time from standby STAB t Minimum total conversion CONV time ...
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STM8S903K3 STM8S903F3 Symbol Parameter |E | Integral linearity error L (1) Data based on characterisation results, not tested in production. (2) ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins should be avoided ...
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Electrical characteristics 1. Example of an actual transfer curve. 2. The ideal transfer curve 3. End point correlation line E = Total unadjusted error: maximum deviation between the actual and the ideal transfer T curves Offset error: deviation ...
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STM8S903K3 STM8S903F3 10.3.11 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. 10.3.11.1 Functional EMS (electromagnetic susceptibility) While executing a simple application (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events ...
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Electrical characteristics (1) Data obtained with HSI clock configuration, after applying HW recommendations described in AN2860 (EMC guidelines for STM8S microcontrollers). 10.3.11.3 Electromagnetic interference (EMI) Based on a simple application running on the product (toggling 2 LEDs through the I/O ...
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... Parameter LU Static latch-up class (1) Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). Table 51: ESD absolute maximum ratings ...
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Package information 11 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...
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STM8S903K3 STM8S903F3 Dim. mm Min D3 E 8.800 E1 6.800 0.450 L1 k 0.0° ccc (1) Values in inches are converted from mm and rounded to 4 decimal digits inches Typ Max Min 5.600 9.000 9.200 0.3465 ...
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Package information 11.2 32-lead UFQFPN package mechanical data Figure 46: 32-lead, ultra thin, fine pitch quad flat no-lead package ( Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve ...
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STM8S903K3 STM8S903F3 Dim. mm Min b 0.180 D 4.850 D2 3.200 E 4.850 E2 3.200 e L 0.300 ddd (1) Values in inches are converted from mm and rounded to 4 decimal digits. inches Typ Max Min 0.250 0.300 0.0071 ...
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Package information 11.3 UFQFPN recommended footprint Figure 47: Recommended footprint for on-board emulation 1. Drawing is not to scale 94/113 0.5mm 4mm [0.157"] 1.65mm [0.065"] 0.3mm [0.012"] 4mm [0.157"] Bottom view DocID15590 Rev 5 STM8S903K3 STM8S903F3 0.8mm [0.032"] 0.5mm 0.9mm ...
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STM8S903K3 STM8S903F3 Figure 48: Recommended footprint without on-board emulation 1. Drawing is not to scale 2. Dimensions are in millimeters 11.4 SDIP32 package mechanical data Figure 49: 32-lead shrink plastic DIP (400 ml) package ...
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Package information Table 55: 32-lead shrink plastic DIP (400 ml) package mechanical data Dim. mm Min A 3.556 A1 0.508 A2 3.048 B 0.356 B1 0.762 C 0.203 D 27.430 E 9.906 E1 7.620 2.540 (1) ...
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STM8S903K3 STM8S903F3 11.5 20-pin TSSOP package mechanical data aaa CP A Table 56: 20-pin, 4.40 mm body, 0.65 mm pitch mechanical data Dim. mm Min A A1 0.050 A2 0.800 b 0.190 c 0.090 D 6.400 E 6.200 E1 4.300 ...
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Package information Dim. mm Min k 0.0° aaa (1) Values in inches are converted from mm and rounded to 4 decimal digits 11.6 20-pin SO package mechanical data Figure 51: 20-lead, plastic small outline (300 mils) package Table 57: 20-lead, ...
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STM8S903K3 STM8S903F3 Dim. mm Min H 10.000 h 0.250 L 0.400 k 0.0° ddd (1) Values in inches are converted from mm and rounded to 4 decimal digits inches Typ Max Min 10.650 0.3937 0.750 0.0098 1.270 0.0157 8.0° 0.0° ...
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Thermal characteristics 12 Thermal characteristics The maximum chip junction temperature (T Operating conditions. The maximum chip-junction temperature, T the following equation Jmax Amax Where: • the maximum ambient temperature in °C Amax • ...
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STM8S903K3 STM8S903F3 12.1 Reference document JESD51-2 integrated circuits thermal test method environment conditions - natural convection (still air). Available from www.jedec.org. 12.2 Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the order code. ...
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Ordering information 13 Ordering information Example: Product class STM8 microcontroller Family type S = Standard Sub-family type 903 = 903 sub-family Pin count pins pins Program memory size Kbytes Package type ...
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... SO20: 1 line of 13 characters max: " _" and " _" UFQFPN32: 1 line of 7 characters max: " _" and " _" Three characters are reserved for code identification. ........................................................................................................... ........................................................................................................... ........................................................................................................... ........................................................................................................... FASTROM code name is assigned by STMicroelectronics 8 Kbyte [ ] STM8S903K3 [ ] STM8S903F3 [ ] STM8S903F3 [ ] STM8S903K3 DocID15590 Rev 5 Ordering information ...
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Ordering information Temperature range [ ] -40°C to +85° -40°C to +125°C Padding value for unused program memory (check only one option) [ ]0xFF [ ]0x83 [ ]0x75 OPT0 memory readout protection (check only one option) [ ...
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STM8S903K3 STM8S903F3 AFR0, AFR1 (check only one option) AFR2 (check only one option) AFR3 (check only one option) AFR4 (check only one option) AFR5 (check only one option) AFR6 (check only one option) AFR7 (check only one option ...
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Ordering information OPT3 watchdog WWDG_HALT (check only one option) WWDG_HW (check only one option) IWDG_HW (check only one option) LSI_EN (check only one option) HSITRIM (check only one option) OPT4 wakeup PRSC (check only one option) CKAWUSEL (check only one ...
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STM8S903K3 STM8S903F3 Notes: ........................................................................................................... DocID15590 Rev 5 Ordering information 107/113 ...
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... In addition, STM8 application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including profiling and coverage to help detect and eliminate bottlenecks in application execution and dead code when fine tuning an application. ...
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STM8S903K3 STM8S903F3 14.2.1 STM8 toolset STM8 toolset with STVD integrated development environment and STVP programming software is available for free download at www.st.com/mcu. This package includes: ST Visual Develop – Full-featured integrated development environment from ST, featuring • Seamless integration ...
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Revision history 15 Revision history Date Revision 30-Apr-2009 1 03-Jun-2009 2 22-Apr-2010 3 110/113 Table 59: Document revision history Changes Initial revision Added bullet point concerning unique identifier to section on cover page. Highlighted internal reference voltage in converter (ADC1) ...
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STM8S903K3 STM8S903F3 Date Revision 30-Apr-2010 4 08-Sep-2010 5 Changes Updated ΘJA in Table 14: STM8S903K3 alternate function remapping bits [1:0] for 32-pin 60°C/W in Selecting the product temperature range Ordering information: replaced package pitch digit by VFQFPN/UFQFPN package, and added ...
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Revision history Date Revision 112/113 Changes Updated "special marking" and "OPT2 alternate function remapping" sections in the STM8S903K3 FASTROM microcontroller option list. DocID15590 Rev 5 STM8S903K3 STM8S903F3 ...
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... ST and the ST logo are trademarks or registered trademarks various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel ...