MCU 32KB FLASH EEPROM 32-VFQFPN

STM8S105K6U6

Manufacturer Part NumberSTM8S105K6U6
DescriptionMCU 32KB FLASH EEPROM 32-VFQFPN
ManufacturerSTMicroelectronics
SeriesSTM8S
STM8S105K6U6 datasheet
 

Specifications of STM8S105K6U6

Core ProcessorSTM8Core Size8-Bit
Speed16MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o25
Program Memory Size32KB (32K x 8)Program Memory TypeFLASH
Eeprom Size1K x 8Ram Size2K x 8
Voltage - Supply (vcc/vdd)2.95 V ~ 5.5 VData ConvertersA/D 7x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VFQFN, 32-VFQFPNProcessor SeriesSTM8S10x
CoreSTM8Data Bus Width8 bit
Data Ram Size2 KBInterface TypeI2C, SPI, UART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os25
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWSTM8
Development Tools By SupplierSTICE-SYS001Minimum Operating Temperature- 40 C
On-chip Adc10 bit, 7 ChannelFor Use With497-10040 - EVAL KIT STM8S DISCOVERY497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names497-10123
STM8S105K6U6
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STM8S105xx
AFR5
(check only one option)
AFR6
(check only one option)
AFR7
(check only one option)
OPT3 watchdog
WWDG_HALT
(check only one option)
WWDG_HW
(check only one option)
IWDG_HW
(check only one option)
LSI_EN
(check only one option)
HSITRIM
(check only one option)
OPT4 wakeup
PRSC
(check only one option)
CKAWUSEL
(check only one option)
[ ] 0: Remapping option inactive. Default alternate functions used.
Refer to pinout description.
[ ] 1: Port B3 alternate function = TIM1_ETR, port B2 alternate
function = TIM1_NCC3, port B1 alternate function = TIM1_CH2N,
port B0 alternate function = TIM1_CH1N.
[ ] 0: Remapping option inactive. Default alternate functions used.
Refer to pinout description
[ ] 1: Port B5 alternate function = I2C_SDA, port B4 alternate
function = I2C_SCL.
[ ] 0: Remapping option inactive. Default alternate functions used.
Refer to pinout description.
[ ] 1: Port D4 alternate function = BEEP.
[ ] 0: No reset generated on halt if WWDG active.
[ ] 1: Reset generated on halt if WWDG active.
[ ] 0: WWDG activated by software.
[ ] 1: WWDG activated by hardware.
[ ] 0: IWDG activated by software.
[ ] 1: IWDG activated by hardware.
[ ] 0: LSI clock is not available as CPU clock source.
[ ] 1: LSI clock is available as CPU clock source.
[ ] 0: 3-bit trimming supported in CLK_HSITRIMR
register.
[ ] 1: 4-bit trimming supported in CLK_HSITRIMR
register.
[ ] for 16 MHz to 128 kHz prescaler.
[ ] for 8 MHz to 128 kHz prescaler.
[ ] for 4 MHz to 128 kHz prescaler.
[ ] 0: LSI clock source selected for AWU.
[ ] 1: HSE clock with prescaler selected as clock source
for AWU.
DocID14771 Rev 10
Ordering information
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