STM8S105K6U6 STMicroelectronics, STM8S105K6U6 Datasheet - Page 12

• Manufacturer Part Number: STM8S105K6U6
• Description: MCU 32KB FLASH EEPROM 32-VFQFPN
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S105K6U6

• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VFQFN, 32-VFQFPN
• Processor Series: STM8S10x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STICE-SYS001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• For Use With: 497-10040 - EVAL KIT STM8S DISCOVERY497-10593 - KIT STARTER FOR STM8S207/8 SER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10123; STM8S105K6U6

Product overview
4
4.1
4.2
12/127
Product overview
The following section intends to give an overview of the basic features of the device functional
modules and peripherals.
For more detailed information please refer to the corresponding family reference manual
(RM0016).
Central processing unit STM8
The 8-bit STM8 core is designed for code efficiency and performance.
It contains 6 internal registers which are directly addressable in each execution context, 20
addressing modes including indexed indirect and relative addressing and 80 instructions.
Architecture and registers
•
•
•
•
•
•
•
•
Addressing
•
•
•
Instruction set
•
•
•
•
•
•
•
Single wire interface module (SWIM) and debug module (DM)
The single wire interface module and debug module permits non-intrusive, real-time in-circuit
debugging and fast memory programming.
Harvard architecture
3-stage pipeline
32-bit wide program memory bus - single cycle fetching for most instructions
X and Y 16-bit index registers - enabling indexed addressing modes with or without offset
and read-modify-write type data manipulations
8-bit accumulator
24-bit program counter - 16-Mbyte linear memory space
16-bit stack pointer - access to a 64 K-level stack
8-bit condition code register - 7 condition flags for the result of the last instruction
20 addressing modes
Indexed indirect addressing mode for look-up tables located anywhere in the address
space
Stack pointer relative addressing mode for local variables and parameter passing
80 instructions with 2-byte average instruction size
Standard data movement and logic/arithmetic functions
8-bit by 8-bit multiplication
16-bit by 8-bit and 16-bit by 16-bit division
Bit manipulation
Data transfer between stack and accumulator (push/pop) with direct stack access
Data transfer using the X and Y registers or direct memory-to-memory transfers
DocID14771 Rev 10
STM8S105xx