STM8S207S6T6C STMicroelectronics, STM8S207S6T6C Datasheet - Page 21

• Manufacturer Part Number: STM8S207S6T6C
• Description: MCU 8BIT 32K MEMORY 44-LQFP
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S207S6T6C

• Mfg Application Notes: STM8S Getting Started
• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: STM8S20x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, 12C, SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Operating Supply Voltage: 2.95 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STICE-SYS001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8955; STM8S207S6T6C

STM8S207xx, STM8S208xx
4.14.3
Asynchronous communication (UART mode)
●
●
●
●
●
●
LIN master capability
●
●
LIN slave mode
●
●
●
●
●
●
●
SPI
●
●
●
●
●
●
●
Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
–
–
Transmission error detection with interrupt generation
Parity control
Emission: Generates 13-bit synch break frame
Reception: Detects 11-bit break frame
Autonomous header handling - one single interrupt per valid message header
Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
Synch delimiter checking
11-bit LIN synch break detection - break detection always active
Parity check on the LIN identifier field
LIN error management
Hot plugging support
Maximum speed: 10 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
Address bit (MSB)
Idle line (interrupt)
Doc ID 14733 Rev 11
MASTER
/2) both for master and slave
CPU
/16) and capable of
Product overview
21/105