IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 


Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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Page 34/104

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ST6208C/ST6209C/ST6210C/ST6220C
6.3 STOP MODE
STOP mode is the lowest power consumption
mode of the MCU (see
Figure
The MCU goes into STOP mode as soon as the
STOP instruction is executed. This has the follow-
ing effects:
– Program execution is stopped, the microcontrol-
ler can be considered as being “frozen”.
– The contents of RAM and the peripheral regis-
ters are kept safely as long as the power supply
voltage is higher than the RAM retention voltage.
– The oscillator is stopped, so peripherals cannot
work except the those that can be driven by an
external clock.
Exit from STOP Mode
The MCU remains in STOP mode until one of the
following events occurs:
– RESET (Watchdog, LVD or RESET pin)
– A peripheral interrupt (assuming this peripheral
can be driven by an external clock)
– An external interrupt (I/O port, NMI)
In all cases a delay of 2048 clock cycles (f
generated to make sure the oscillator has started
properly.
34/104
1
The Program Counter then points to the starting
22).
address of the interrupt or RESET service routine
(see
Figure
STOP Mode and Watchdog
When the Watchdog is active (hardware or soft-
ware activation), the STOP instruction is disabled
and a WAIT instruction will be executed in its place
unless the EXCTNL option bit is set to 1 in the op-
tion bytes and a a high level is present on the NMI
pin. In this case, the STOP instruction will be exe-
cuted and the Watchdog will be frozen.
Figure 21. STOP Mode Timing Overview
RUN
STOP
INSTRUCTION
) is
INT
21).
2048
CLOCK
CYCLE
STOP
RUN
DELAY
RESET
FETCH
OR
VECTOR
INTERRUPT