IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 


Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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8-BIT TIMER (Cont’d)
8.2.7 Register Description
PRESCALER COUNTER REGISTER (PSCR)
Address: 0D2h - Read/Write
Reset Value: 0111 1111 (7Fh)
7
PSCR
PSCR
PSCR
PSCR
PSCR
7
6
5
4
3
Bit 7 = PSCR7: Not used, always read as “0”.
Bits 6:0 = PSCR[6:0] Prescaler LSB.
TIMER COUNTER REGISTER (TCR)
Address: 0D3h - Read / Write
Reset Value: 1111 1111 (FFh)
7
TCR7
TCR6
TCR5
TCR4
TCR3
Bits 7:0 = TCR[7:0] Timer counter bits.
TIMER STATUS CONTROL REGISTER (TSCR)
Address: 0D4h - Read/Write
Reset Value: 0000 0000 (00h)
7
TMZ
ETI
TOUT DOUT
PSI
Bit 7 = TMZ Timer Zero bit.
A low-to-high transition indicates that the timer
count register has underflowed. It means that the
TCR value has changed from 00h to FFh.
This bit must be cleared by user software.
0: Counter has not underflowed
1: Counter underflow occurred
Bit 6 = ETI Enable Timer Interrupt.
When set, enables the timer interrupt request. If
Table 15. 8-Bit Timer Register Map and Reset Values
Address
Register Label
(Hex.)
PSCR
0D2h
Reset Value
TCR
0D3h
Reset Value
TSCR
0D4h
Reset Value
ST6208C/ST6209C/ST6210C/ST6220C
ETI=0 the timer interrupt is disabled. If ETI=1 and
TMZ=1 an interrupt request is generated.
0: Interrupt disabled (reset state)
1: Interrupt enabled
0
Bit 5 = TOUT Timer Output Control.
When low, this bit selects the input mode for the
PSCR
PSCR
PSCR
TIMER pin. When high the output mode is select-
2
1
0
ed.
0: Input mode (reset state)
1: Output mode, the TIMER pin is configured as
push-pull output
Bit 4 = DOUT Data Output.
Data sent to the timer output when TMZ is set high
(output mode only). Input mode selection (input
mode only).
0
Bit 3 = PSI: Prescaler Initialize bit.
TCR2
TCR1
TCR0
Used to initialize the prescaler and inhibit its count-
ing. When PSI=“0” the prescaler is set to 7Fh and
the counter is inhibited. When PSI=“1” the prescal-
er is enabled to count downwards. As long as
PSE=“1” both counter and prescaler are not run-
ning
0: Counting disabled
1: Counting enabled
0
Bits 1:0 = PS[2:0] Prescaler Mux. Select.
PS2
PS1
PS0
These bits select the division ratio of the prescaler
register.
Table 14. Prescaler Division Factors
PS2
0
0
0
0
1
1
1
1
7
6
5
PSCR7
PSCR6
PSCR5
PSCR4
0
1
1
TCR7
TCR6
TCR5
TCR4
1
1
1
TMZ
ETI
TOUT
DOUT
0
0
0
PS1
PS0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
4
3
2
1
PSCR3
PSCR2
PSCR1
1
1
1
1
TCR3
TCR2
TCR1
1
1
1
1
PSI
PS2
PS1
0
0
0
0
Divided by
1
2
4
8
16
32
64
128
0
PSCR0
1
TCR0
1
PS0
0
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